From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] ppc4xx/POST: Handle cached SDRAM correctly in Denali (440EPx) ECC POST
Date: Sun, 28 Nov 2010 11:07:20 +0100 [thread overview]
Message-ID: <201011281107.20974.sr@denx.de> (raw)
In-Reply-To: <1290782722-9459-1-git-send-email-sr@denx.de>
On Friday 26 November 2010 15:45:22 Stefan Roese wrote:
> This patch fixes a problem in the Denali (440EPx) SDRAM ECC POST test.
> When cache is enabled in the SDRAM area, the values written to SDRAM
> need to be flushed from cache to SDRAM using the dcfb instruction.
>
> Without this patch the POST ECC test failed. Now its working again on
> platforms with cache enabled in SDRAM.
Applied to u-boot-ppc4xx/master. Thanks.
Cheers,
Stefan
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: office at denx.de
prev parent reply other threads:[~2010-11-28 10:07 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-11-26 14:45 [U-Boot] [PATCH] ppc4xx/POST: Handle cached SDRAM correctly in Denali (440EPx) ECC POST Stefan Roese
2010-11-28 10:07 ` Stefan Roese [this message]
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