From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wei Wang2 Subject: Re: [PATCH 4/4] amd iommu: Large io page support - implementation Date: Tue, 7 Dec 2010 12:20:03 +0100 Message-ID: <201012071220.03624.wei.wang2@amd.com> References: <201012031703.48774.wei.wang2@amd.com> <987664A83D2D224EAE907B061CE93D5301936C1BF6@orsmsx505.amr.corp.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: In-Reply-To: <987664A83D2D224EAE907B061CE93D5301936C1BF6@orsmsx505.amr.corp.intel.com> Content-Disposition: inline List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: "Kay, Allen M" Cc: "xen-devel@lists.xensource.com" List-Id: xen-devel@lists.xenproject.org Hi Allen, Actually, each amd iommu pde entry uses bit 9-11 to encode next page table= =20 level, but these bits are also used as AVL bits by p2m table to encode=20 different page types...So, it might not be quite easy to share NPT table wi= th=20 amd iommu unless we change p2m table encoding for this first. Thanks, Wei On Tuesday 07 December 2010 01:47:22 Kay, Allen M wrote: > Hi Wei, > > My understanding is that both EPT/NPT already supports 2M and 1G page > sizes. If this is true and if NPT supports the same page table format as > AMD iommu, shouldn't iommu 2M and 1G support just a matter of pointing > iommu page table pointer to NPT page table of the same guest OS thus > sharing the same page table between NPT and AMD iommu? > > This should save a lot code changes in iommu code. We just need to flush > iommu page table in IOTLB at appropriate places. > > Allen > > -----Original Message----- > From: xen-devel-bounces@lists.xensource.com > [mailto:xen-devel-bounces@lists.xensource.com] On Behalf Of Wei Wang2 Sen= t: > Friday, December 03, 2010 8:04 AM > To: xen-devel@lists.xensource.com > Subject: [Xen-devel] [PATCH 4/4] amd iommu: Large io page support - > implementation > > This is the implementation. > > Thanks, > We > Signed-off-by: Wei Wang > -- > Legal Information: > Advanced Micro Devices GmbH > Sitz: Dornach, Gemeinde Aschheim, > Landkreis M=FCnchen Registergericht M=FCnchen, HRB Nr. 43632 > Gesch=E4ftsf=FChrer: > Alberto Bozzo, Andrew Bowd