From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kenneth Graunke Subject: Re: [PATCH] drm/i915: Make sample_c messages go faster on Haswell. Date: Thu, 30 Oct 2014 12:57:04 -0700 Message-ID: <2010265.UHNBrhCu3p@vakarian> References: <1414620763-2841-1-git-send-email-kenneth@whitecape.org> <3172682.WiaV6hDkmN@vakarian> <20141030192601.GX10649@intel.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2142205728==" Return-path: Received: from smtp121.ord1c.emailsrvr.com (smtp121.ord1c.emailsrvr.com [108.166.43.121]) by gabe.freedesktop.org (Postfix) with ESMTP id 64F666E0D1 for ; Thu, 30 Oct 2014 13:02:09 -0700 (PDT) In-Reply-To: <20141030192601.GX10649@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Ville =?ISO-8859-1?Q?Syrj=E4l=E4?= Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============2142205728== Content-Type: multipart/signed; boundary="nextPart4089475.OA0LgAdzUC"; micalg="pgp-sha1"; protocol="application/pgp-signature" --nextPart4089475.OA0LgAdzUC Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="iso-8859-1" On Thursday, October 30, 2014 09:26:01 PM Ville Syrj=E4l=E4 wrote: > On Thu, Oct 30, 2014 at 10:32:38AM -0700, Kenneth Graunke wrote: > > On Thursday, October 30, 2014 01:01:30 PM Ville Syrj=E4l=E4 wrote: > > > On Thu, Oct 30, 2014 at 02:32:40AM -0700, Kenneth Graunke wrote: > > > > On Thursday, October 30, 2014 11:00:51 AM Ville Syrj=E4l=E4 wro= te: > > > > > On Thu, Oct 30, 2014 at 10:50:03AM +0200, Ville Syrj=E4l=E4 w= rote: > > > > > > On Wed, Oct 29, 2014 at 03:12:43PM -0700, Kenneth Graunke w= rote: > > > > > > > Haswell significantly improved the performance of sampler= _c=20 > > messages, > > > > > > > but the optimization appears to be off by default. Later= =20 platforms > > > > > > > remove this bit, and apparently always enable the optimiz= ation. > > > > > > >=20 > > > > > > > Improves performance in "Counter Strike: Global Offensive= " by=20 18% > > > > > > > at default settings on Iris Pro. No Piglit regressions. > > > > > >=20 > > > > > > Nice. We need more bits like this ;) > > > > > >=20 > > > > > > >=20 > > > > > > > Signed-off-by: Kenneth Graunke > > > > > > > --- > > > > > > > drivers/gpu/drm/i915/i915_reg.h | 1 + > > > > > > > drivers/gpu/drm/i915/intel_pm.c | 4 ++++ > > > > > > > 2 files changed, 5 insertions(+) > > > > > > >=20 > > > > > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h=20 > > > > b/drivers/gpu/drm/i915/i915_reg.h > > > > > > > index 77fce96..340821a 100644 > > > > > > > --- a/drivers/gpu/drm/i915/i915_reg.h > > > > > > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > > > > > > @@ -5952,6 +5952,7 @@ enum punit_power_well { > > > > > > > #define HSW_ROW_CHICKEN3_L3_GLOBAL_ATOMICS_DISABLE (= 1 << 6) > > > > > > > =20 > > > > > > > #define HALF_SLICE_CHICKEN3=09=090xe184 > > > > > > > +#define HSW_SAMPLE_C_PERFORMANCE=09(1<<9) > > > > > > > #define GEN8_CENTROID_PIXEL_OPT_DIS=09(1<<8) > > > > > > > #define GEN8_SAMPLER_POWER_BYPASS_DIS=09(1<<1) > > > > > > > =20 > > > > > > > diff --git a/drivers/gpu/drm/i915/intel_pm.c=20 > > > > b/drivers/gpu/drm/i915/intel_pm.c > > > > > > > index 7a69eba..50c72a7 100644 > > > > > > > --- a/drivers/gpu/drm/i915/intel_pm.c > > > > > > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > > > > > > @@ -5736,6 +5736,10 @@ static void=20 haswell_init_clock_gating(struct=20 > > > > drm_device *dev) > > > > > > > =09I915_WRITE(GEN7_GT_MODE, > > > > > > > =09=09 GEN6_WIZ_HASHING_MASK | GEN6_WIZ_HASHING_16x4);= > > > > > > > =20 > > > > > > > +=09/* Make sample_c messages faster. */ > > > > > >=20 > > > > > > I found a name for it in the w/a database. > > > > > >=20 > > > > > > WaSampleCChickenBitEnable:hsw > > > > > >=20 > > > > > > Reviewed-by: Ville Syrj=E4l=E4 > > > > >=20 > > > > > Oh actually it says palette won't work when this bit is on. I= 'm=20 assuming > > > > > that's the texture palette. Do we have any use of that anywhe= re? > > > >=20 > > > > That's a good point. 3DSTATE_SAMPLER_PALETTE_LOAD and the=20 A8P8/indexed=20 > > > > formats aren't used by Mesa or xf86-video-intel, but it looks l= ike=20 they=20 > > might=20 > > > > be used by libva. > > > >=20 > > > > Can someone confirm that libva does use the sampler palette? > > > >=20 > > > > If they do, what do we do about it? > > >=20 > > > I suppose the best option then would be to use an LRI from a batc= h, > > > which means the register would need to be added to the cmd parser= > > > white list. This is one of the context saved registers so doing t= he > > > LRI just once per context should be enough. > >=20 > > I don't like that solution. For one, it's impossible - you can't L= RI from=20 > > userspace batches, even if you add it to the kernel command parser'= s=20 > > whitelist, because the hardware scanner is still enabled. Given th= at I've=20 > > been waiting two years for this capability, I want to find a more=20= immediate=20 > > solution. >=20 > Ah. I've somehow convinced myself the cmd parser might actually be do= ing > something besides just eating CPU cycles these days. But I guess not.= >=20 > >=20 > > Another option is to have some sort of execbuf flag...maybe a 3D/Me= dia=20 "usage"=20 > > flag. If set to 3D, write 0x6000200...if media, write 0x6000000. = Or=20 > > something specific. I do hate adding more junk to the execbuf path= ,=20 though. > >=20 > > Other ideas? >=20 > Fast vs. slow flag? :) >=20 > More seriously, one somewhat crappy option would be to initialize tha= t > bit to 1 for all explicit contexts, and then have the kernel always t= urn > it off before executing something with the default context. It's not > unlike how we imagined the RS stuff would work since old userspace > doesn't know to turn RS off when using the default context. Interesting idea - that might work. We don't need mid-batch changes ei= ther. I don't think HALF_SLICE_CHICKEN3 is part of the logical context, FWIW.= Before we get too much further...we should check if libva is actually b= roken. =20 I don't know if this means the sampler palette completely doesn't work,= or if=20 it just means sample_c doesn't work with the palette. If it's the latt= er,=20 we're probably fine, because I doubt libva uses sample_c. =2D-Ken --nextPart4089475.OA0LgAdzUC Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part. 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