From: Robert Richter <robert.richter@amd.com>
To: Jan Beulich <JBeulich@novell.com>
Cc: "Herrmann3, Andreas" <Andreas.Herrmann3@amd.com>,
"Roedel, Joerg" <Joerg.Roedel@amd.com>,
"mingo@elte.hu" <mingo@elte.hu>,
JeremyFitzhardinge <jeremy@goop.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"hpa@zytor.com" <hpa@zytor.com>
Subject: Re: [PATCH] x86: use PCI method for enabling AMD extended config space before MSR method
Date: Fri, 7 Jan 2011 10:59:20 +0100 [thread overview]
Message-ID: <20110107095920.GO4739@erda.amd.com> (raw)
In-Reply-To: <4D26D160020000780002AEBE@vpn.id2.novell.com>
On 07.01.11 02:40:00, Jan Beulich wrote:
> >>> On 06.01.11 at 18:20, Robert Richter <robert.richter@amd.com> wrote:
> > On 06.01.11 11:57:35, Jan Beulich wrote:
> >> +#ifdef CONFIG_AMD_NB
> >> + /* Try the PCI method first. */
> >> + if (early_pci_allowed()) {
> >> + unsigned int i, n;
> >> +
> >> + for (n = i = 0; !n && amd_bus_dev_ranges[i].dev_limit; ++i) {
> >> + u8 bus = amd_bus_dev_ranges[i].bus;
> >> + u8 slot = amd_bus_dev_ranges[i].dev_base;
> >> + u8 limit = amd_bus_dev_ranges[i].dev_limit;
> >> +
> >> + for (; slot < limit; ++slot) {
> >> + u32 val = read_pci_config(bus, slot, 3, 0);
> >> +
> >> + if (!early_is_k8_nb(val))
> >> + continue;
> >> +
> >> + val = read_pci_config(bus, slot, 3, 0x8c);
> >> + if (!(val & (ENABLE_CF8_EXT_CFG >> 32))) {
> >> + val |= ENABLE_CF8_EXT_CFG >> 32;
> >> + write_pci_config(bus, slot, 3, 0x8c,
> >> + val);
> >> + }
> >> + ++n;
> >> + }
> >> + }
> >> + pr_info("Extended Config Space enabled on %u nodes\n", n);
> >
> > Isn't i the number of nodes?
>
> No, "i" is the number of PCI devices looked at (but only those that
> pass early_is_k8_nb() are of interest).
Right, your code is correct.
Thanks,
-Robert
--
Advanced Micro Devices, Inc.
Operating System Research Center
prev parent reply other threads:[~2011-01-07 9:59 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-01-06 16:57 [PATCH] x86: use PCI method for enabling AMD extended config space before MSR method Jan Beulich
2011-01-06 17:20 ` Robert Richter
2011-01-06 17:28 ` Robert Richter
2011-01-07 12:58 ` Ingo Molnar
2011-01-07 13:33 ` Jan Beulich
2011-01-07 7:40 ` Jan Beulich
2011-01-07 9:59 ` Robert Richter [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20110107095920.GO4739@erda.amd.com \
--to=robert.richter@amd.com \
--cc=Andreas.Herrmann3@amd.com \
--cc=JBeulich@novell.com \
--cc=Joerg.Roedel@amd.com \
--cc=hpa@zytor.com \
--cc=jeremy@goop.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@elte.hu \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.