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From: Mark Brown <broonie@opensource.wolfsonmicro.com>
To: Stephen Warren <swarren@nvidia.com>
Cc: "linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
	"alsa-devel@alsa-project.org" <alsa-devel@alsa-project.org>
Subject: Re: WM8903 WM8903_CLK_SYS_ENA vs. MCLK availability
Date: Sat, 8 Jan 2011 00:04:29 +0000	[thread overview]
Message-ID: <20110108000429.GA23676@opensource.wolfsonmicro.com> (raw)
In-Reply-To: <74CDBE0F657A3D45AFBB94109FB122FF0310567DFA@HQMAIL01.nvidia.com>

On Fri, Jan 07, 2011 at 03:31:36PM -0800, Stephen Warren wrote:

> Is this intended; should the WM8903 driver not be enabling
> SYS_ENA so broadly. Perhaps e.g. it should only be enabled
> during SND_SOC_BIAS_ON/_PREPARE, and not during _STANDBY?

It's enabled because the initial bringup of the device uses the write
sequencer which relies on the MCLK, and more practically because devices
of the era that the driver was written were rarely able to manage the
external clock.

For the initial driver submission I suggest fixing the MCLK rate for
44.1kHz and leaving it on all the time under the control of the machine
driver, I'll make sure someone from Wolfson enhances the WM8903 driver
so that the machine driver can be made more flexible.

      reply	other threads:[~2011-01-08  0:04 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-01-07 23:31 WM8903 WM8903_CLK_SYS_ENA vs. MCLK availability Stephen Warren
2011-01-08  0:04 ` Mark Brown [this message]

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