Re: [RFC PATCH] x86: stop machine text poke should issue sync core

[Mathieu Desnoyers <mathieu.desnoyers@efficios.com>]

* Masami Hiramatsu (masami.hiramatsu.pt@hitachi.com) wrote:
> (2011/03/03 15:10), H. Peter Anvin wrote:
> > On 02/28/2011 07:24 AM, Mathieu Desnoyers wrote:
> >>
> >> Index: linux-2.6-lttng/arch/x86/kernel/alternative.c
> >> ===================================================================
> >> --- linux-2.6-lttng.orig/arch/x86/kernel/alternative.c
> >> +++ linux-2.6-lttng/arch/x86/kernel/alternative.c
> >> @@ -612,6 +612,12 @@ static int __kprobes stop_machine_text_p
> >>  
> >>  	flush_icache_range((unsigned long)tpp->addr,
> >>  			   (unsigned long)tpp->addr + tpp->len);
> >> +	/*
> >> +	 * Intel Archiecture Software Developer's Manual section 7.1.3 specifies
> >> +	 * that a core serializing instruction such as "cpuid" should be
> >> +	 * executed on _each_ core before the new instruction is made visible.
> >> +	 */
> >> +	sync_core();
> >>  	return 0;
> >>  }
> >>  
> > 
> > Isn't this executed from an IPI handler, which will return with IRET (a
> > serializing instruction) anyway?
> 
> No, now stop_machine uses per-cpu workqueue, so that handler will be
> executed from worker threads. There is no iret anymore.
> 
> BTW, Mathieu, since the latest kernel has batch-text_poke_smp, this patch
> needs to be updated.

OK, I'll update the patch and respin it.

Thanks,

Mathieu

> 
> Thank you,
> 
> -- 
> Masami HIRAMATSU
> 2nd Dept. Linux Technology Center
> Hitachi, Ltd., Systems Development Laboratory
> E-mail: masami.hiramatsu.pt@hitachi.com

-- 
Mathieu Desnoyers
Operating System Efficiency R&D Consultant
EfficiOS Inc.
http://www.efficios.com