merge error in intel_agp_insert_sg_entries() in xen.git

[Olaf Hering <olaf@aepfle.de>]

There is a missing } in one of the patches for
drivers/char/agp/intel-agp.c:intel_agp_insert_sg_entries() in xen.git.
The diff I get looks like this:

--- linux-2.6.32/drivers/char/agp/intel-agp.c
+++ linux-2.6-jeremy-xen-stable-2.6.32.x/drivers/char/agp/intel-agp.c
@@ -10,14 +10,20 @@
 #include <linux/agp_backend.h>
 #include <asm/smp.h>
 #include "agp.h"
+#include <xen/page.h>
+#include <asm/xen/page.h>

 /*
  * If we have Intel graphics, we're not going to have anything other than
  * an Intel IOMMU. So make the correct use of the PCI DMA API contingent
  * on the Intel IOMMU support (CONFIG_DMAR).
  * Only newer chipsets need to bother with this, of course.
+ *
+ * Xen guests accessing graphics hardware also need proper translation
+ * between pseudo-physical addresses and real machine addresses, which
+ * is also achieved by using the DMA API.
  */
-#ifdef CONFIG_DMAR
+#if defined(CONFIG_DMAR) || defined(CONFIG_XEN)
 #define USE_PCI_DMA_API 1
 #endif

@@ -296,8 +302,20 @@ static void intel_agp_insert_sg_entries(
        int i, j;

        for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
+               phys_addr_t phys = page_to_phys(mem->pages[i]);
+               if (xen_pv_domain()) {
+                       phys_addr_t xen_phys = PFN_PHYS(pfn_to_mfn(
+                                       page_to_pfn(mem->pages[i])));
+                       if (xen_phys != phys) {
+                               printk(KERN_ERR "Compile kernel with " \
+                                       "CONFIG_DMAR to get rid of this " \
+                                       "warning!\n");
+                               WARN_ON_ONCE(xen_phys != phys);
+                               /* Fixup: */
+                               phys = xen_phys;
+                       }
                writel(agp_bridge->driver->mask_memory(agp_bridge,
-                               page_to_phys(mem->pages[i]), mask_type),
+                               phys, mask_type),
                       intel_private.gtt+j);
        }

@@