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Date: Wed, 23 Mar 2011 14:48:36 +1100
From: David Gibson <david@gibson.dropbear.id.au>
Subject: Re: [Qemu-devel] [PATCH 18/26] Implement the PAPR (pSeries)
	virtualized interrupt controller (xics)
Message-ID: <20110323034836.GE22782@yookeroo>
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To: Anthony Liguori <anthony@codemonkey.ws>
Cc: paulus@samba.org, agraf@suse.de, anton@samba.org, qemu-devel@nongnu.org

On Thu, Mar 17, 2011 at 08:13:27AM -0500, Anthony Liguori wrote:
> On 03/16/2011 08:34 PM, David Gibson wrote:
> >
> >>>+/*
> >>>+ * ICP: Presentation layer
> >>>+ */
> >>>+
> >>>+struct icp_server_state {
> >>>+    uint32_t cppr :8;
> >>>+    uint32_t xisr :24;
> >>No real reason to use bitfields here.
> >Well.. in the hardware xics implementation, CPPR and XISR are
> >considered fields of the one 32-bit register, XIRR.  Matching that is
> >why I have the bitfield.
> 
> Bitfields don't work well with the way we save device state.

Good point.  In fact, I think I even hit that when I did some
preliminary looking at adding partition save/migration support to the
pseries stuff.  Bitfields removed in the next version.

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson