From: Thomas Gleixner <tglx@linutronix.de>
To: linux-mips@linux-mips.org
Cc: Ralf Baechle <ralf@linux-mips.org>
Subject: [patch 01/38] mips; Convert alchemy to new irq chip functions
Date: Wed, 23 Mar 2011 21:08:44 -0000 [thread overview]
Message-ID: <20110323210534.669706549@linutronix.de> (raw)
In-Reply-To: 20110323210437.398062704@linutronix.de
[-- Attachment #1: mips-alch.patch --]
[-- Type: text/plain, Size: 9603 bytes --]
Fix the deadlock in set_type() while at it.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/mips/alchemy/common/irq.c | 98 ++++++++++++++++++-------------------
arch/mips/alchemy/devboards/bcsr.c | 18 +++---
2 files changed, 59 insertions(+), 57 deletions(-)
Index: linux-mips-next/arch/mips/alchemy/common/irq.c
===================================================================
--- linux-mips-next.orig/arch/mips/alchemy/common/irq.c
+++ linux-mips-next/arch/mips/alchemy/common/irq.c
@@ -39,7 +39,7 @@
#include <asm/mach-pb1x00/pb1000.h>
#endif
-static int au1x_ic_settype(unsigned int irq, unsigned int flow_type);
+static int au1x_ic_settype(struct irq_data *d, unsigned int flow_type);
/* NOTE on interrupt priorities: The original writers of this code said:
*
@@ -218,17 +218,17 @@ struct au1xxx_irqmap au1200_irqmap[] __i
};
-static void au1x_ic0_unmask(unsigned int irq_nr)
+static void au1x_ic0_unmask(struct irq_data *d)
{
- unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE;
+ unsigned int bit = d->irq - AU1000_INTC0_INT_BASE;
au_writel(1 << bit, IC0_MASKSET);
au_writel(1 << bit, IC0_WAKESET);
au_sync();
}
-static void au1x_ic1_unmask(unsigned int irq_nr)
+static void au1x_ic1_unmask(struct irq_data *d)
{
- unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE;
+ unsigned int bit = d->irq - AU1000_INTC1_INT_BASE;
au_writel(1 << bit, IC1_MASKSET);
au_writel(1 << bit, IC1_WAKESET);
@@ -236,31 +236,31 @@ static void au1x_ic1_unmask(unsigned int
* nowhere in the current kernel sources is it disabled. --mlau
*/
#if defined(CONFIG_MIPS_PB1000)
- if (irq_nr == AU1000_GPIO15_INT)
+ if (d->irq == AU1000_GPIO15_INT)
au_writel(0x4000, PB1000_MDR); /* enable int */
#endif
au_sync();
}
-static void au1x_ic0_mask(unsigned int irq_nr)
+static void au1x_ic0_mask(struct irq_data *d)
{
- unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE;
+ unsigned int bit = d->irq - AU1000_INTC0_INT_BASE;
au_writel(1 << bit, IC0_MASKCLR);
au_writel(1 << bit, IC0_WAKECLR);
au_sync();
}
-static void au1x_ic1_mask(unsigned int irq_nr)
+static void au1x_ic1_mask(struct irq_data *d)
{
- unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE;
+ unsigned int bit = d->irq - AU1000_INTC1_INT_BASE;
au_writel(1 << bit, IC1_MASKCLR);
au_writel(1 << bit, IC1_WAKECLR);
au_sync();
}
-static void au1x_ic0_ack(unsigned int irq_nr)
+static void au1x_ic0_ack(struct irq_data *d)
{
- unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE;
+ unsigned int bit = d->irq - AU1000_INTC0_INT_BASE;
/*
* This may assume that we don't get interrupts from
@@ -271,9 +271,9 @@ static void au1x_ic0_ack(unsigned int ir
au_sync();
}
-static void au1x_ic1_ack(unsigned int irq_nr)
+static void au1x_ic1_ack(struct irq_data *d)
{
- unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE;
+ unsigned int bit = d->irq - AU1000_INTC1_INT_BASE;
/*
* This may assume that we don't get interrupts from
@@ -284,9 +284,9 @@ static void au1x_ic1_ack(unsigned int ir
au_sync();
}
-static void au1x_ic0_maskack(unsigned int irq_nr)
+static void au1x_ic0_maskack(struct irq_data *d)
{
- unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE;
+ unsigned int bit = d->irq - AU1000_INTC0_INT_BASE;
au_writel(1 << bit, IC0_WAKECLR);
au_writel(1 << bit, IC0_MASKCLR);
@@ -295,9 +295,9 @@ static void au1x_ic0_maskack(unsigned in
au_sync();
}
-static void au1x_ic1_maskack(unsigned int irq_nr)
+static void au1x_ic1_maskack(struct irq_data *d)
{
- unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE;
+ unsigned int bit = d->irq - AU1000_INTC1_INT_BASE;
au_writel(1 << bit, IC1_WAKECLR);
au_writel(1 << bit, IC1_MASKCLR);
@@ -306,9 +306,9 @@ static void au1x_ic1_maskack(unsigned in
au_sync();
}
-static int au1x_ic1_setwake(unsigned int irq, unsigned int on)
+static int au1x_ic1_setwake(struct irq_data *d, unsigned int on)
{
- int bit = irq - AU1000_INTC1_INT_BASE;
+ int bit = d->irq - AU1000_INTC1_INT_BASE;
unsigned long wakemsk, flags;
/* only GPIO 0-7 can act as wakeup source. Fortunately these
@@ -336,28 +336,30 @@ static int au1x_ic1_setwake(unsigned int
*/
static struct irq_chip au1x_ic0_chip = {
.name = "Alchemy-IC0",
- .ack = au1x_ic0_ack,
- .mask = au1x_ic0_mask,
- .mask_ack = au1x_ic0_maskack,
- .unmask = au1x_ic0_unmask,
- .set_type = au1x_ic_settype,
+ .irq_ack = au1x_ic0_ack,
+ .irq_mask = au1x_ic0_mask,
+ .irq_mask_ack = au1x_ic0_maskack,
+ .irq_unmask = au1x_ic0_unmask,
+ .irq_set_type = au1x_ic_settype,
};
static struct irq_chip au1x_ic1_chip = {
.name = "Alchemy-IC1",
- .ack = au1x_ic1_ack,
- .mask = au1x_ic1_mask,
- .mask_ack = au1x_ic1_maskack,
- .unmask = au1x_ic1_unmask,
- .set_type = au1x_ic_settype,
- .set_wake = au1x_ic1_setwake,
+ .irq_ack = au1x_ic1_ack,
+ .irq_mask = au1x_ic1_mask,
+ .irq_mask_ack = au1x_ic1_maskack,
+ .irq_unmask = au1x_ic1_unmask,
+ .irq_set_type = au1x_ic_settype,
+ .irq_set_wake = au1x_ic1_setwake,
};
-static int au1x_ic_settype(unsigned int irq, unsigned int flow_type)
+static int au1x_ic_settype(struct irq_data *d, unsigned int flow_type)
{
struct irq_chip *chip;
unsigned long icr[6];
- unsigned int bit, ic;
+ unsigned int bit, ic, irq = d->irq;
+ irq_flow_handler_t handler = NULL;
+ unsigned char *name = NULL;
int ret;
if (irq >= AU1000_INTC1_INT_BASE) {
@@ -387,47 +389,47 @@ static int au1x_ic_settype(unsigned int
au_writel(1 << bit, icr[5]);
au_writel(1 << bit, icr[4]);
au_writel(1 << bit, icr[0]);
- set_irq_chip_and_handler_name(irq, chip,
- handle_edge_irq, "riseedge");
+ handler = handle_edge_irq;
+ name = "riseedge";
break;
case IRQ_TYPE_EDGE_FALLING: /* 0:1:0 */
au_writel(1 << bit, icr[5]);
au_writel(1 << bit, icr[1]);
au_writel(1 << bit, icr[3]);
- set_irq_chip_and_handler_name(irq, chip,
- handle_edge_irq, "falledge");
+ handler = handle_edge_irq;
+ name = "falledge";
break;
case IRQ_TYPE_EDGE_BOTH: /* 0:1:1 */
au_writel(1 << bit, icr[5]);
au_writel(1 << bit, icr[1]);
au_writel(1 << bit, icr[0]);
- set_irq_chip_and_handler_name(irq, chip,
- handle_edge_irq, "bothedge");
+ handler = handle_edge_irq;
+ name = "bothedge";
break;
case IRQ_TYPE_LEVEL_HIGH: /* 1:0:1 */
au_writel(1 << bit, icr[2]);
au_writel(1 << bit, icr[4]);
au_writel(1 << bit, icr[0]);
- set_irq_chip_and_handler_name(irq, chip,
- handle_level_irq, "hilevel");
+ handler = handle_level_irq;
+ name = "hilevel";
break;
case IRQ_TYPE_LEVEL_LOW: /* 1:1:0 */
au_writel(1 << bit, icr[2]);
au_writel(1 << bit, icr[1]);
au_writel(1 << bit, icr[3]);
- set_irq_chip_and_handler_name(irq, chip,
- handle_level_irq, "lowlevel");
+ handler = handle_level_irq;
+ name = "lowlevel";
break;
case IRQ_TYPE_NONE: /* 0:0:0 */
au_writel(1 << bit, icr[5]);
au_writel(1 << bit, icr[4]);
au_writel(1 << bit, icr[3]);
- /* set at least chip so we can call set_irq_type() on it */
- set_irq_chip(irq, chip);
break;
default:
ret = -EINVAL;
}
+ __irq_set_chip_handler_name_locked(d->irq, chip, handler, name);
+
au_sync();
return ret;
@@ -504,11 +506,11 @@ static void __init au1000_init_irq(struc
*/
for (i = AU1000_INTC0_INT_BASE;
(i < AU1000_INTC0_INT_BASE + 32); i++)
- au1x_ic_settype(i, IRQ_TYPE_NONE);
+ au1x_ic_settype(irq_get_irq_data(i), IRQ_TYPE_NONE);
for (i = AU1000_INTC1_INT_BASE;
(i < AU1000_INTC1_INT_BASE + 32); i++)
- au1x_ic_settype(i, IRQ_TYPE_NONE);
+ au1x_ic_settype(irq_get_irq_data(i), IRQ_TYPE_NONE);
/*
* Initialize IC0, which is fixed per processor.
@@ -526,7 +528,7 @@ static void __init au1000_init_irq(struc
au_writel(1 << bit, IC0_ASSIGNSET);
}
- au1x_ic_settype(irq_nr, map->im_type);
+ au1x_ic_settype(irq_get_irq_data(irq_nr), map->im_type);
++map;
}
Index: linux-mips-next/arch/mips/alchemy/devboards/bcsr.c
===================================================================
--- linux-mips-next.orig/arch/mips/alchemy/devboards/bcsr.c
+++ linux-mips-next/arch/mips/alchemy/devboards/bcsr.c
@@ -97,26 +97,26 @@ static void bcsr_csc_handler(unsigned in
* CPLD generates tons of spurious interrupts (at least on my DB1200).
* -- mlau
*/
-static void bcsr_irq_mask(unsigned int irq_nr)
+static void bcsr_irq_mask(struct irq_data *d)
{
- unsigned short v = 1 << (irq_nr - bcsr_csc_base);
+ unsigned short v = 1 << (d->irq - bcsr_csc_base);
__raw_writew(v, bcsr_virt + BCSR_REG_INTCLR);
__raw_writew(v, bcsr_virt + BCSR_REG_MASKCLR);
wmb();
}
-static void bcsr_irq_maskack(unsigned int irq_nr)
+static void bcsr_irq_maskack(struct irq_data *d)
{
- unsigned short v = 1 << (irq_nr - bcsr_csc_base);
+ unsigned short v = 1 << (d->irq - bcsr_csc_base);
__raw_writew(v, bcsr_virt + BCSR_REG_INTCLR);
__raw_writew(v, bcsr_virt + BCSR_REG_MASKCLR);
__raw_writew(v, bcsr_virt + BCSR_REG_INTSTAT); /* ack */
wmb();
}
-static void bcsr_irq_unmask(unsigned int irq_nr)
+static void bcsr_irq_unmask(struct irq_data *d)
{
- unsigned short v = 1 << (irq_nr - bcsr_csc_base);
+ unsigned short v = 1 << (d->irq - bcsr_csc_base);
__raw_writew(v, bcsr_virt + BCSR_REG_INTSET);
__raw_writew(v, bcsr_virt + BCSR_REG_MASKSET);
wmb();
@@ -124,9 +124,9 @@ static void bcsr_irq_unmask(unsigned int
static struct irq_chip bcsr_irq_type = {
.name = "CPLD",
- .mask = bcsr_irq_mask,
- .mask_ack = bcsr_irq_maskack,
- .unmask = bcsr_irq_unmask,
+ .irq_mask = bcsr_irq_mask,
+ .irq_mask_ack = bcsr_irq_maskack,
+ .irq_unmask = bcsr_irq_unmask,
};
void __init bcsr_init_irq(int csc_start, int csc_end, int hook_irq)
next prev parent reply other threads:[~2011-03-23 21:09 UTC|newest]
Thread overview: 97+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-03-23 21:08 [patch 00/38] mips: irq chip overhaul and cleanup Thomas Gleixner
2011-03-23 21:08 ` Thomas Gleixner [this message]
2011-03-24 7:41 ` [patch 01/38] mips; Convert alchemy to new irq chip functions Manuel Lauss
2011-03-24 8:14 ` Thomas Gleixner
2011-03-24 14:06 ` Ralf Baechle
2011-03-23 21:08 ` [patch 02/38] mips: ar7: Convert to new irq_chip functions Thomas Gleixner
2011-03-24 14:09 ` Ralf Baechle
2011-03-23 21:08 ` [patch 04/38] mips: bcm63xx: " Thomas Gleixner
2011-03-24 14:10 ` Ralf Baechle
2011-03-23 21:08 ` [patch 03/38] mips: ath79: " Thomas Gleixner
2011-03-24 14:07 ` Ralf Baechle
2011-03-23 21:08 ` [patch 05/38] mips: cavium-octeon: " Thomas Gleixner
2011-03-23 21:31 ` David Daney
2011-03-24 14:12 ` Ralf Baechle
2011-03-23 21:08 ` [patch 06/38] mips: dec: " Thomas Gleixner
2011-03-24 14:18 ` Ralf Baechle
2011-03-24 15:21 ` Maciej W. Rozycki
2011-03-24 16:16 ` Thomas Gleixner
2011-03-24 18:14 ` Maciej W. Rozycki
2011-03-24 19:29 ` Thomas Gleixner
2011-03-25 0:33 ` Maciej W. Rozycki
2011-03-29 12:56 ` Atsushi Nemoto
2011-03-29 13:20 ` Maciej W. Rozycki
2011-03-23 21:08 ` [patch 07/38] mips: emma: " Thomas Gleixner
2011-03-24 14:18 ` Ralf Baechle
2011-03-23 21:08 ` [patch 08/38] mips: jazz: " Thomas Gleixner
2011-03-24 14:19 ` Ralf Baechle
2011-03-23 21:08 ` [patch 09/38] MIPS: JZ4740: Convert to new irq functions Thomas Gleixner
2011-03-24 14:20 ` Ralf Baechle
2011-03-23 21:08 ` [patch 10/38] MIPS: JZ4740: GPIO: Use shared irq chip for all gpios Thomas Gleixner
2011-03-24 12:15 ` Sergei Shtylyov
2011-03-24 12:59 ` Thomas Gleixner
2011-03-24 14:28 ` Ralf Baechle
2011-03-23 21:08 ` [patch 11/38] mips: jz4740: Cleanup the mechanical irq_chip conversion Thomas Gleixner
2011-03-24 14:29 ` Ralf Baechle
2011-03-23 21:08 ` [patch 12/38] misp: lasat: Convert to new irq_chip functions Thomas Gleixner
2011-03-24 14:31 ` Ralf Baechle
2011-03-23 21:08 ` [patch 13/38] mips: i8259: " Thomas Gleixner
2011-03-24 14:32 ` Ralf Baechle
2011-03-23 21:08 ` [patch 14/38] mips: gic: " Thomas Gleixner
2011-03-24 12:22 ` Sergei Shtylyov
2011-03-24 14:34 ` Ralf Baechle
2011-03-23 21:08 ` [patch 15/38] mips: gt641: " Thomas Gleixner
2011-03-24 14:34 ` Ralf Baechle
2011-03-23 21:08 ` [patch 16/38] mips: msc01: " Thomas Gleixner
2011-03-24 14:35 ` Ralf Baechle
2011-03-23 21:09 ` [patch 17/38] mips: rm7000: " Thomas Gleixner
2011-03-24 14:35 ` Ralf Baechle
2011-03-23 21:09 ` [patch 18/38] mips: rm9000: " Thomas Gleixner
2011-03-24 14:36 ` Ralf Baechle
2011-03-23 21:09 ` [patch 20/38] mips: txx9: Convert core " Thomas Gleixner
2011-03-24 14:39 ` Ralf Baechle
2011-03-23 21:09 ` [patch 19/38] misp: irq_cpu: Convert " Thomas Gleixner
2011-03-24 12:28 ` Sergei Shtylyov
2011-03-24 14:37 ` Ralf Baechle
2011-03-23 21:09 ` [patch 21/38] mips: smtc: Use irq_data in smtc_forward_irq() Thomas Gleixner
2011-03-24 14:40 ` Ralf Baechle
2011-03-23 21:09 ` [patch 22/38] mips: smtc: Cleanup the hook mess and use irq_data Thomas Gleixner
2011-03-24 14:40 ` Ralf Baechle
2011-03-23 21:09 ` [patch 23/38] mips: Use generic show_interrupts() Thomas Gleixner
2011-03-24 14:41 ` Ralf Baechle
2011-03-23 21:09 ` [patch 24/38] mips: loongson: Convert to new irq_chip functions Thomas Gleixner
2011-03-24 14:43 ` Ralf Baechle
2011-03-23 21:09 ` [patch 25/38] mips: pmc-sierra: " Thomas Gleixner
2011-03-24 14:44 ` Ralf Baechle
2011-03-23 21:09 ` [patch 26/38] mips: pnx83xx: " Thomas Gleixner
2011-03-24 14:44 ` Ralf Baechle
2011-03-23 21:09 ` [patch 27/38] mips: pnx855: " Thomas Gleixner
2011-03-24 12:32 ` Sergei Shtylyov
2011-03-24 14:45 ` Ralf Baechle
2011-03-23 21:09 ` [patch 28/38] mips: powertv: " Thomas Gleixner
2011-03-24 14:47 ` Ralf Baechle
2011-03-23 21:09 ` [patch 29/38] mips: rb532: " Thomas Gleixner
2011-03-24 14:53 ` Ralf Baechle
2011-03-23 21:09 ` [patch 30/38] mips: sgi-ip22: " Thomas Gleixner
2011-03-24 14:49 ` Ralf Baechle
2011-03-23 21:09 ` [patch 31/38] mips: sgi-ip27: " Thomas Gleixner
2011-03-24 14:50 ` Ralf Baechle
2011-03-23 21:09 ` [patch 32/38] mips: sgi32: " Thomas Gleixner
2011-03-24 14:50 ` Ralf Baechle
2011-03-23 21:09 ` [patch 33/38] mips: sybyte: " Thomas Gleixner
2011-03-24 14:51 ` Ralf Baechle
2011-03-23 21:09 ` [patch 34/38] mips: sni: " Thomas Gleixner
2011-03-24 14:52 ` Ralf Baechle
2011-03-23 21:09 ` [patch 35/38] mips: txx9: " Thomas Gleixner
2011-03-24 14:53 ` Ralf Baechle
2011-03-23 21:09 ` [patch 36/38] mips: vr41: " Thomas Gleixner
2011-03-24 12:36 ` Sergei Shtylyov
2011-03-24 14:55 ` Ralf Baechle
2011-03-23 21:09 ` [patch 37/38] mips: vr41xx: Cleanup the direct access to irq_desc[] Thomas Gleixner
2011-03-24 12:44 ` Sergei Shtylyov
2011-03-24 13:00 ` Thomas Gleixner
2011-03-24 13:56 ` Sergei Shtylyov
2011-03-24 14:21 ` Thomas Gleixner
2011-03-24 15:12 ` Ralf Baechle
2011-03-23 21:09 ` [patch 38/38] mips: Select GENERIC_HARDIRQS_NO_DEPRECATED Thomas Gleixner
2011-03-24 14:15 ` Ralf Baechle
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20110323210534.669706549@linutronix.de \
--to=tglx@linutronix.de \
--cc=linux-mips@linux-mips.org \
--cc=ralf@linux-mips.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.