From mboxrd@z Thu Jan 1 00:00:00 1970 From: arnd@arndb.de (Arnd Bergmann) Date: Mon, 2 May 2011 17:52:25 +0200 Subject: [RFC PATCH 4/4] ARM: Xilinx: Adding Xilinx board support In-Reply-To: <4DBEB1A8.3040202@gmail.com> References: <20110502045207.24800.91172.stgit@ponder> <201105021039.32374.arnd@arndb.de> <4DBEB1A8.3040202@gmail.com> Message-ID: <201105021752.25273.arnd@arndb.de> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Monday 02 May 2011, Rob Herring wrote: > The SCU is accessed before ioremap is up. The only reason it is accessed > early is to determine the number of cores present. The number of cores should definitely be available in the device tree, normally by looking at the root interrupt controller. > The L2 can certainly be ioremapped and probed via DT. How about > something like this: > > l2cc { > compatible = "arm,pl310-l2"; > reg = <0xfff12000 0x1000>; > aux-value = <0>; > aux-mask = <0xffffffff>; > }; sounds good to me. Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756889Ab1EBPwn (ORCPT ); Mon, 2 May 2011 11:52:43 -0400 Received: from moutng.kundenserver.de ([212.227.17.8]:61462 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751647Ab1EBPwk (ORCPT ); Mon, 2 May 2011 11:52:40 -0400 From: Arnd Bergmann To: Rob Herring Subject: Re: [RFC PATCH 4/4] ARM: Xilinx: Adding Xilinx board support Date: Mon, 2 May 2011 17:52:25 +0200 User-Agent: KMail/1.12.2 (Linux/2.6.37; KDE/4.3.2; x86_64; ; ) Cc: Grant Likely , linux-arm-kernel@lists.infradead.org, Nicolas Pitre , Russell King , devicetree-discuss@lists.ozlabs.org, linux-kernel@vger.kernel.org References: <20110502045207.24800.91172.stgit@ponder> <201105021039.32374.arnd@arndb.de> <4DBEB1A8.3040202@gmail.com> In-Reply-To: <4DBEB1A8.3040202@gmail.com> MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Message-Id: <201105021752.25273.arnd@arndb.de> X-Provags-ID: V02:K0:QTI0iv4dajP7UHZTpDLEZL8Nbxz9xt68uiN3Yu4Vmfh LNHKflFZfJ/EPAZnKFGi4ZIGafLsDwPCZbiXXoB3OogCCSxa/V uwX+oF6iccT7QieZLdm4IF1pum8VyYMKr5udZ1XqujFBWzU6PZ XmCgH95rFYXH8IUBmesMyvj4Pf96bY8yXTxhc194IDk3L+1VYN G9dPN0/WuzGt14UMRlUJw== Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Monday 02 May 2011, Rob Herring wrote: > The SCU is accessed before ioremap is up. The only reason it is accessed > early is to determine the number of cores present. The number of cores should definitely be available in the device tree, normally by looking at the root interrupt controller. > The L2 can certainly be ioremapped and probed via DT. How about > something like this: > > l2cc { > compatible = "arm,pl310-l2"; > reg = <0xfff12000 0x1000>; > aux-value = <0>; > aux-mask = <0xffffffff>; > }; sounds good to me. Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 From: Arnd Bergmann Subject: Re: [RFC PATCH 4/4] ARM: Xilinx: Adding Xilinx board support Date: Mon, 2 May 2011 17:52:25 +0200 Message-ID: <201105021752.25273.arnd@arndb.de> References: <20110502045207.24800.91172.stgit@ponder> <201105021039.32374.arnd@arndb.de> <4DBEB1A8.3040202@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <4DBEB1A8.3040202-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org Sender: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org To: Rob Herring Cc: Nicolas Pitre , Russell King , devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: devicetree@vger.kernel.org On Monday 02 May 2011, Rob Herring wrote: > The SCU is accessed before ioremap is up. The only reason it is accessed > early is to determine the number of cores present. The number of cores should definitely be available in the device tree, normally by looking at the root interrupt controller. > The L2 can certainly be ioremapped and probed via DT. How about > something like this: > > l2cc { > compatible = "arm,pl310-l2"; > reg = <0xfff12000 0x1000>; > aux-value = <0>; > aux-mask = <0xffffffff>; > }; sounds good to me. Arnd