From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mark Brown Subject: Re: [PATCH 1/2 v2] ASoC: soc-cache: block based rbtree compression Date: Tue, 3 May 2011 12:21:25 +0100 Message-ID: <20110503112124.GF1762@opensource.wolfsonmicro.com> References: <1304339309-28820-1-git-send-email-dp@opensource.wolfsonmicro.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from opensource2.wolfsonmicro.com (opensource.wolfsonmicro.com [80.75.67.52]) by alsa0.perex.cz (Postfix) with ESMTP id F29D1103815 for ; Tue, 3 May 2011 13:21:28 +0200 (CEST) Content-Disposition: inline In-Reply-To: <1304339309-28820-1-git-send-email-dp@opensource.wolfsonmicro.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: alsa-devel-bounces@alsa-project.org Errors-To: alsa-devel-bounces@alsa-project.org To: Dimitris Papastamos Cc: alsa-devel@alsa-project.org, patches@opensource.wolfsonmicro.com, Liam Girdwood , Liam Girdwood List-Id: alsa-devel@alsa-project.org On Mon, May 02, 2011 at 01:28:28PM +0100, Dimitris Papastamos wrote: > Each node manages a block of up to RBTREE_BLOCK_NUM registers. There can be > no two nodes with overlapping blocks. Currently there is no check in the code > to scream in case that ever happens. Each block has a base and top register, > all others lie in between these registers. Note that variable length blocks > aren't supported. So if you have an interval [8, 15] and only some of those > registers actually exist on the device, the block will have the non-existent > registers as zero. There is also no way of reporting that any of those > non-existent registers were accessed/modified. As we discussed verbally I'd really rather see this support variable length blocks and figure out (ideally at init time) which registers exist. This avoids all the fiddling around working out what to set the block size to which seems a lot clearer and cleaner.