diff for duplicates of <20110509152547.GD11410@atomide.com> diff --git a/a/1.txt b/N1/1.txt index 0d591fc..e7ebb2a 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,14 +1,14 @@ -* Mike Rapoport <mike.rapoport-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> [110507 12:03]: -> On Wed, May 4, 2011 at 12:22 PM, Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org> wrote: -> > * Colin Cross <ccross-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org> [110502 14:26]: -> >> On Mon, May 2, 2011 at 1:52 PM, Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote: +* Mike Rapoport <mike.rapoport@gmail.com> [110507 12:03]: +> On Wed, May 4, 2011 at 12:22 PM, Tony Lindgren <tony@atomide.com> wrote: +> > * Colin Cross <ccross@google.com> [110502 14:26]: +> >> On Mon, May 2, 2011 at 1:52 PM, Stephen Warren <swarren@nvidia.com> wrote: > >> > >> * Drive strength is also controlled through groups of pins, but -> >> different groups than pinmux. Most of the drive strength groups are +> >> different groups than pinmux. ?Most of the drive strength groups are > >> collections of pad mux groups, but there are a few pins that are in > >> the same pad mux group but a different drive strength group. > >> * Setting a pin as a GPIO overrides its group's mux setting, except -> >> for the group's tristate. You must untristate the entire group to use +> >> for the group's tristate. ?You must untristate the entire group to use > >> a single pin as a GPIO. > >> * Each group has a "safe mode", but which mux id to select to enter > >> the safe mode is completely random. diff --git a/a/content_digest b/N1/content_digest index 6625885..e2f2213 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -3,35 +3,23 @@ "ref\0BANLkTimKU-=GXzrn8=MQn-GAmKHOvKmuNQ@mail.gmail.com\0" "ref\020110504092219.GW2092@atomide.com\0" "ref\0BANLkTin9-aKZjEGdBeZqDwHwADXCYERErg@mail.gmail.com\0" - "ref\0BANLkTin9-aKZjEGdBeZqDwHwADXCYERErg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0" - "From\0Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>\0" - "Subject\0Re: [PATCH 1/4] drivers: create a pinmux subsystem\0" + "From\0tony@atomide.com (Tony Lindgren)\0" + "Subject\0[PATCH 1/4] drivers: create a pinmux subsystem\0" "Date\0Mon, 9 May 2011 08:25:47 -0700\0" - "To\0Mike Rapoport <mike.rapoport-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" - "Cc\0Colin Cross <ccross-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>" - Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> - Linus Walleij <linus.walleij-0IS4wlFg1OjSUeElwK9/Pw@public.gmane.org> - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org> - Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org> - Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> - Martin Persson <martin.persson-0IS4wlFg1OjSUeElwK9/Pw@public.gmane.org> - Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> - linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - " Erik Gilling <konkers-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" - "* Mike Rapoport <mike.rapoport-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> [110507 12:03]:\n" - "> On Wed, May 4, 2011 at 12:22 PM, Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org> wrote:\n" - "> > * Colin Cross <ccross-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org> [110502 14:26]:\n" - "> >> On Mon, May 2, 2011 at 1:52 PM, Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote:\n" + "* Mike Rapoport <mike.rapoport@gmail.com> [110507 12:03]:\n" + "> On Wed, May 4, 2011 at 12:22 PM, Tony Lindgren <tony@atomide.com> wrote:\n" + "> > * Colin Cross <ccross@google.com> [110502 14:26]:\n" + "> >> On Mon, May 2, 2011 at 1:52 PM, Stephen Warren <swarren@nvidia.com> wrote:\n" "> >>\n" "> >> * Drive strength is also controlled through groups of pins, but\n" - "> >> different groups than pinmux. \302\240Most of the drive strength groups are\n" + "> >> different groups than pinmux. ?Most of the drive strength groups are\n" "> >> collections of pad mux groups, but there are a few pins that are in\n" "> >> the same pad mux group but a different drive strength group.\n" "> >> * Setting a pin as a GPIO overrides its group's mux setting, except\n" - "> >> for the group's tristate. \302\240You must untristate the entire group to use\n" + "> >> for the group's tristate. ?You must untristate the entire group to use\n" "> >> a single pin as a GPIO.\n" "> >> * Each group has a \"safe mode\", but which mux id to select to enter\n" "> >> the safe mode is completely random.\n" @@ -49,4 +37,4 @@ "\n" Tony -113e4cf479b5a03086db736eb52defa2da3c076c2965c6dcd25f756635228103 +8fef696ce70a648d5628a4798b225342890d66328a040c715a93c24249809593
diff --git a/a/1.txt b/N2/1.txt index 0d591fc..05646a0 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,7 +1,7 @@ -* Mike Rapoport <mike.rapoport-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> [110507 12:03]: -> On Wed, May 4, 2011 at 12:22 PM, Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org> wrote: -> > * Colin Cross <ccross-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org> [110502 14:26]: -> >> On Mon, May 2, 2011 at 1:52 PM, Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote: +* Mike Rapoport <mike.rapoport@gmail.com> [110507 12:03]: +> On Wed, May 4, 2011 at 12:22 PM, Tony Lindgren <tony@atomide.com> wrote: +> > * Colin Cross <ccross@google.com> [110502 14:26]: +> >> On Mon, May 2, 2011 at 1:52 PM, Stephen Warren <swarren@nvidia.com> wrote: > >> > >> * Drive strength is also controlled through groups of pins, but > >> different groups than pinmux. Most of the drive strength groups are diff --git a/a/content_digest b/N2/content_digest index 6625885..f59824b 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -3,28 +3,27 @@ "ref\0BANLkTimKU-=GXzrn8=MQn-GAmKHOvKmuNQ@mail.gmail.com\0" "ref\020110504092219.GW2092@atomide.com\0" "ref\0BANLkTin9-aKZjEGdBeZqDwHwADXCYERErg@mail.gmail.com\0" - "ref\0BANLkTin9-aKZjEGdBeZqDwHwADXCYERErg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0" - "From\0Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>\0" + "From\0Tony Lindgren <tony@atomide.com>\0" "Subject\0Re: [PATCH 1/4] drivers: create a pinmux subsystem\0" "Date\0Mon, 9 May 2011 08:25:47 -0700\0" - "To\0Mike Rapoport <mike.rapoport-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" - "Cc\0Colin Cross <ccross-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>" - Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> - Linus Walleij <linus.walleij-0IS4wlFg1OjSUeElwK9/Pw@public.gmane.org> - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org> - Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org> - Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> - Martin Persson <martin.persson-0IS4wlFg1OjSUeElwK9/Pw@public.gmane.org> - Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> - linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - " Erik Gilling <konkers-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>\0" + "To\0Mike Rapoport <mike.rapoport@gmail.com>\0" + "Cc\0Colin Cross <ccross@google.com>" + Stephen Warren <swarren@nvidia.com> + Linus Walleij <linus.walleij@stericsson.com> + linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> + linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> + Grant Likely <grant.likely@secretlab.ca> + Lee Jones <lee.jones@linaro.org> + Martin Persson <martin.persson@stericsson.com> + Linus Walleij <linus.walleij@linaro.org> + linux-tegra@vger.kernel.org <linux-tegra@vger.kernel.org> + " Erik Gilling <konkers@google.com>\0" "\00:1\0" "b\0" - "* Mike Rapoport <mike.rapoport-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> [110507 12:03]:\n" - "> On Wed, May 4, 2011 at 12:22 PM, Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org> wrote:\n" - "> > * Colin Cross <ccross-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org> [110502 14:26]:\n" - "> >> On Mon, May 2, 2011 at 1:52 PM, Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote:\n" + "* Mike Rapoport <mike.rapoport@gmail.com> [110507 12:03]:\n" + "> On Wed, May 4, 2011 at 12:22 PM, Tony Lindgren <tony@atomide.com> wrote:\n" + "> > * Colin Cross <ccross@google.com> [110502 14:26]:\n" + "> >> On Mon, May 2, 2011 at 1:52 PM, Stephen Warren <swarren@nvidia.com> wrote:\n" "> >>\n" "> >> * Drive strength is also controlled through groups of pins, but\n" "> >> different groups than pinmux. \302\240Most of the drive strength groups are\n" @@ -49,4 +48,4 @@ "\n" Tony -113e4cf479b5a03086db736eb52defa2da3c076c2965c6dcd25f756635228103 +d98183e71233e3518269be8d26ae3be3ab39c5d75129e83274dfb8805c2c7417
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