From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alex Hacker Date: Fri, 13 May 2011 19:45:32 +0600 Subject: [ath9k-devel] MCS16-MCS19 HGI. In-Reply-To: References: <20110513110458.GA27253@infinet.ru> Message-ID: <20110513134532.GA27551@infinet.ru> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: ath9k-devel@lists.ath9k.org On Fri, May 13, 2011 at 05:18:37PM +0530, Mohammed Shafi wrote: > this is my theory, it may be wrong, > all those rates in the rate table are marked as invalid and also they > are HT20 rates. also not hardwares support HT20 SGI > we have this check > if (AR_SREV_9287_11_OR_LATER(ah) || AR_SREV_9271(ah)) > pCap->hw_caps |= ATH9K_HW_CAP_SGI_20; > > so may be to avoid the rate control algorithm selecting those rates > this might had be done. Yes, I know that the AR9280 does not support SGI rates in HT20 mode. I'm not about this little bit. The current ath9k rate table in rc.c contains 3 spatial streams rates (MCS16-MCS23) for newer three chain AR93xx chips. This table includes information about MCSs 16-23 SGI and 20-23 HGI but not MCSs 16-19 HGI this is true for HT20 and HT40. Yes, some of these rates marked as invalid but present. I can not explain this fact for myself. May be Senthil baboo can help me? Best regards, Alex.