From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mark Brown Subject: Re: [PATCH 1/2] ASoC: tlv320aic3x: Don't sync first two registers from register cache Date: Sun, 22 May 2011 18:21:14 +0800 Message-ID: <20110522102112.GA21476@opensource.wolfsonmicro.com> References: <1305899558-21719-1-git-send-email-jhnikula@gmail.com> <4DD7DAAA.3070504@ti.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from opensource2.wolfsonmicro.com (opensource.wolfsonmicro.com [80.75.67.52]) by alsa0.perex.cz (Postfix) with ESMTP id 8E120103833 for ; Sun, 22 May 2011 12:21:24 +0200 (CEST) Content-Disposition: inline In-Reply-To: <4DD7DAAA.3070504@ti.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: alsa-devel-bounces@alsa-project.org Errors-To: alsa-devel-bounces@alsa-project.org To: Liam Girdwood Cc: "alsa-devel@alsa-project.org" List-Id: alsa-devel@alsa-project.org On Sat, May 21, 2011 at 04:30:50PM +0100, Liam Girdwood wrote: > Both > Acked-by: Liam Girdwood Acked-by: Mark Brown As they're TI devices I guess you'd want to apply them?