From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jesse Barnes Subject: Re: [PATCH 2/6] drm/i915: Use of a CPU fence is mandatory to update FBC regions upon CPU writes Date: Thu, 7 Jul 2011 09:13:22 -0700 Message-ID: <20110707091322.024ab5da@jbarnes-desktop> References: <1310039291-22554-1-git-send-email-chris@chris-wilson.co.uk> <1310039291-22554-3-git-send-email-chris@chris-wilson.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from oproxy3-pub.bluehost.com (oproxy3-pub.bluehost.com [69.89.21.8]) by gabe.freedesktop.org (Postfix) with SMTP id 76BFA9E709 for ; Thu, 7 Jul 2011 09:13:35 -0700 (PDT) In-Reply-To: <1310039291-22554-3-git-send-email-chris@chris-wilson.co.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Thu, 7 Jul 2011 12:48:07 +0100 Chris Wilson wrote: > ...and this requirement is enforced by intel_update_fbc() so we can > remove the later check from g4x_enable_fbc() and ironlake_enable_fbc(). > > Signed-off-by: Chris Wilson > --- > drivers/gpu/drm/i915/intel_display.c | 16 ++++------------ > 1 files changed, 4 insertions(+), 12 deletions(-) > Yeah we probably shouldn't try removing that restriction... Reviewed-by: Jesse Barnes -- Jesse Barnes, Intel Open Source Technology Center