diff for duplicates of <20110710083359.GB23199@opensource.wolfsonmicro.com> diff --git a/a/1.txt b/N1/1.txt index c16c268..3ee396c 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -2,10 +2,10 @@ On Sun, Jul 10, 2011 at 04:17:13PM +0800, Dong Aisheng wrote: > 2011/7/9 Mark Brown <broonie@opensource.wolfsonmicro.com>: > > On Fri, Jul 08, 2011 at 11:59:42PM +0800, Dong Aisheng wrote: -> >> + switch (clk_id) { -> >> + case MXS_SAIF_SYS_CLK: -> >> + clk_set_rate(saif->clk, freq); -> >> + clk_enable(saif->clk); +> >> + ? ? switch (clk_id) { +> >> + ? ? case MXS_SAIF_SYS_CLK: +> >> + ? ? ? ? ? ? clk_set_rate(saif->clk, freq); +> >> + ? ? ? ? ? ? clk_enable(saif->clk); > > How would one turn this clock off? @@ -32,9 +32,9 @@ control it from the probe and remove. > >> +static irqreturn_t mxs_saif_irq(int irq, void *dev_id) > >> +{ -> >> + struct mxs_saif *saif = dev_id; +> >> + ? ? struct mxs_saif *saif = dev_id; > >> + -> >> + if (saif->fifo_err_counter++ % 100 == 0) +> >> + ? ? if (saif->fifo_err_counter++ % 100 == 0) > > > > The rate limit looks awfully suspicious... > Originally it's just for printing less error messages when the issue happens. @@ -42,10 +42,10 @@ control it from the probe and remove. Please do so. -> >> + clk_set_rate(saif->clk, 12000000); -> >> + clk_enable(saif->clk); +> >> + ? ? clk_set_rate(saif->clk, 12000000); +> >> + ? ? clk_enable(saif->clk); -> > How did you pick this clock rate and why does it need to be set? It's +> > How did you pick this clock rate and why does it need to be set? ?It's > > not an obvious audio rate... > It's initial clock rate for normal operations of codecs based on MCLK. diff --git a/a/content_digest b/N1/content_digest index 2528655..68b247b 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,25 +2,20 @@ "ref\01310140790-2132-3-git-send-email-b29396@freescale.com\0" "ref\020110709025252.GC26900@sirena.org.uk\0" "ref\0CAA+hA=S0HTqNt+OxprdaqZMF8_9NF8G54UKJprcWc2DCbGf0xA@mail.gmail.com\0" - "From\0Mark Brown <broonie@opensource.wolfsonmicro.com>\0" - "Subject\0Re: [PATCH 02/10] ASoc: mxs: add mxs-saif driver\0" + "From\0broonie@opensource.wolfsonmicro.com (Mark Brown)\0" + "Subject\0[PATCH 02/10] ASoc: mxs: add mxs-saif driver\0" "Date\0Sun, 10 Jul 2011 17:34:02 +0900\0" - "To\0Dong Aisheng <dongas86@gmail.com>\0" - "Cc\0alsa-devel@alsa-project.org" - Dong Aisheng <b29396@freescale.com> - s.hauer@pengutronix.de - linux-arm-kernel@lists.infradead.org - " lrg@ti.com\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Sun, Jul 10, 2011 at 04:17:13PM +0800, Dong Aisheng wrote:\n" "> 2011/7/9 Mark Brown <broonie@opensource.wolfsonmicro.com>:\n" "> > On Fri, Jul 08, 2011 at 11:59:42PM +0800, Dong Aisheng wrote:\n" "\n" - "> >> + \302\240 \302\240 switch (clk_id) {\n" - "> >> + \302\240 \302\240 case MXS_SAIF_SYS_CLK:\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 clk_set_rate(saif->clk, freq);\n" - "> >> + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 clk_enable(saif->clk);\n" + "> >> + ? ? switch (clk_id) {\n" + "> >> + ? ? case MXS_SAIF_SYS_CLK:\n" + "> >> + ? ? ? ? ? ? clk_set_rate(saif->clk, freq);\n" + "> >> + ? ? ? ? ? ? clk_enable(saif->clk);\n" "\n" "> > How would one turn this clock off?\n" "\n" @@ -47,9 +42,9 @@ "\n" "> >> +static irqreturn_t mxs_saif_irq(int irq, void *dev_id)\n" "> >> +{\n" - "> >> + \302\240 \302\240 struct mxs_saif *saif = dev_id;\n" + "> >> + ? ? struct mxs_saif *saif = dev_id;\n" "> >> +\n" - "> >> + \302\240 \302\240 if (saif->fifo_err_counter++ % 100 == 0)\n" + "> >> + ? ? if (saif->fifo_err_counter++ % 100 == 0)\n" "> >\n" "> > The rate limit looks awfully suspicious...\n" "> Originally it's just for printing less error messages when the issue happens.\n" @@ -57,10 +52,10 @@ "\n" "Please do so.\n" "\n" - "> >> + \302\240 \302\240 clk_set_rate(saif->clk, 12000000);\n" - "> >> + \302\240 \302\240 clk_enable(saif->clk);\n" + "> >> + ? ? clk_set_rate(saif->clk, 12000000);\n" + "> >> + ? ? clk_enable(saif->clk);\n" "\n" - "> > How did you pick this clock rate and why does it need to be set? \302\240It's\n" + "> > How did you pick this clock rate and why does it need to be set? ?It's\n" "> > not an obvious audio rate...\n" "\n" "> It's initial clock rate for normal operations of codecs based on MCLK.\n" @@ -73,4 +68,4 @@ "should delegate the rate selection and ideally also the enable control\n" to the machine driver, it can set something in its probe() function. -eed0de6c44eed59dab42166d682190e7f0df1221637ae2a8f8310f999dfa6dba +5fd30e33f7305902a5b101c6fc5b843cae359bec8de89e664fd4f948f35981d9
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