From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alex Hacker Date: Mon, 11 Jul 2011 22:27:13 +0600 Subject: [ath9k-devel] AR9380 - Transmit power control per packet In-Reply-To: References: <001501cc3a22$f49d4b70$ddd7e250$@gmx.net> <000801cc3d50$d4373e50$7ca5baf0$@gmx.net> <20110708112722.GA7392@infinet.ru> <20110708141933.GA7759@infinet.ru> <20110711104806.GA1994@infinet.ru> <20110711151328.GA2696@infinet.ru> Message-ID: <20110711162713.GA2964@infinet.ru> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: ath9k-devel@lists.ath9k.org Yes, the EEPROM power calibration is implemented (oh excuse me, retyped from ath9k :). Any way power detector calibration can not be a reason, so plain (not per packet) power control is works as expected. Best regards, Alex. On Mon, Jul 11, 2011 at 08:51:48PM +0530, Mohammed Shafi wrote: > On Mon, Jul 11, 2011 at 8:43 PM, Alex Hacker wrote: > > On Mon, Jul 11, 2011 at 10:39:46PM +0800, Adrian Chadd wrote: > >> Have you just manually tried setting the relevant register using the > >> debug register read/write setup? > >> > > The TPC code is written aproximately 2 years ago in our propiertary AR5416/AR92xx driver > > which I currently adopt for AR9300. For AR5416/AR92xx chips it works fine. > > I think this module has to be taken into acoount ar9003_eeprom.c ? > > static int ar9003_hw_power_control_override(struct ath_hw *ah, > int frequency, > int *correction, > int *voltage, int *temperature) > > > > > > >> Or when you set bit 6 in 0x993c, bit 6 doesn't stay set? > > > > Yes, exactly the following are happens: > > ?REG_WRITE(0X993c,0x7f); > > ?REG_READ(0X993c) -> 0x00367044; > > ?REG_WRITE(0X993c,); > > ?REG_READ(0X993c) -> 0x0000007f; > > > >> adrian > > Best regards, > > Alex. > > _______________________________________________ > > ath9k-devel mailing list > > ath9k-devel at lists.ath9k.org > > https://lists.ath9k.org/mailman/listinfo/ath9k-devel > > > > > > -- > shafi