From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754947Ab1G0U3b (ORCPT ); Wed, 27 Jul 2011 16:29:31 -0400 Received: from caramon.arm.linux.org.uk ([78.32.30.218]:33052 "EHLO caramon.arm.linux.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754860Ab1G0U33 (ORCPT ); Wed, 27 Jul 2011 16:29:29 -0400 Date: Wed, 27 Jul 2011 21:28:59 +0100 From: Russell King To: Jaswinder Singh Cc: "Williams, Dan J" , Mika Westerberg , "Koul, Vinod" , Linus Walleij , linux-kernel@vger.kernel.org, linus.walleij@stericsson.com, per.friden@stericsson.com, wei.zhang@freescale.com, ebony.zhu@freescale.com, iws@ovro.caltech.edu, s.hauer@pengutronix.de, maciej.sosnowski@intel.com, saeed@marvell.com, shawn.guo@freescale.com, yur@emcraft.com, agust@denx.de, iwamatsu.nobuhiro@renesas.com, per.forlin@stericsson.com, jonas.aberg@stericsson.com, anemo@mba.ocn.ne.jp Subject: Re: [PATCHv2] DMAEngine: Let dmac drivers to set chan_id Message-ID: <20110727202859.GA5028@flint.arm.linux.org.uk> References: <1311740499.1536.56.camel@vkoul-udesk3> <1311757347.1536.103.camel@vkoul-udesk3> <20110727095909.GB16623@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.18 (2008-05-17) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jul 27, 2011 at 10:44:53PM +0530, Jaswinder Singh wrote: > 1) What I propose > http://lists.infradead.org/pipermail/linux-arm-kernel/2011-July/059212.html > > 2) Why RMK thinks I am the biggest idiot on earth > http://lists.infradead.org/pipermail/linux-arm-kernel/2011-July/059217.html > > 3) How I ask for better proof of that > http://lists.infradead.org/pipermail/linux-arm-kernel/2011-July/059223.html Look, your idea is completely mad and insane - you just can't represent the matching stuff as capabilities. How do you deal with a peripheral being linked to a _specific_ DMA engine on a _specific_ DMA request signal? What if your system has two DMA engines, each with 32 request signals? Are you going to have something like a 128-bit capability mask? Peripheral drivers don't know what DMA signal the SoC designer may have chosen. Peripheral drivers don't know what DMA engine they're connected to. Yet again, I say, the only place which knows that is data associated with the _platform_. The platform has to be involved with binding the DMA engine plus DMA channel with the peripheral. You can't get away from that. Not with capabilities. Not with stuff from the peripheral driver saying "I want a M2P channel" in a capability field, etc So I think your idea is totally unworkable, and it doesn't come close to fitting with any DMA setup I've seen. If that means you think I'm calling you an idiot, then so be it. I just think you're wrong on a purely technical level. -- Russell King Linux kernel 2.6 ARM Linux - http://www.arm.linux.org.uk/ maintainer of: