From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jesse Barnes Subject: Re: [PATCH] drm/i915: apply phase pointer override on SNB+ too Date: Fri, 29 Jul 2011 12:43:42 -0700 Message-ID: <20110729124342.68aaffca@jbarnes-desktop> References: <1311961811-1813-1-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from oproxy9.bluehost.com (oproxy9.bluehost.com [69.89.24.6]) by gabe.freedesktop.org (Postfix) with SMTP id CF0CC9E82A for ; Fri, 29 Jul 2011 12:43:51 -0700 (PDT) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Keith Packard Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Fri, 29 Jul 2011 11:47:55 -0700 Keith Packard wrote: > On Fri, 29 Jul 2011 10:50:11 -0700, Jesse Barnes wrote: > > > + flags |= FDI_PHASE_SYNC_OVR(pipe); > > + I915_WRITE(SOUTH_CHICKEN1, flags); /* once to unlock... */ > > + flags |= FDI_PHASE_SYNC_EN(pipe); > > + I915_WRITE(SOUTH_CHICKEN1, flags); /* then again to enable */ > > + POSTING_READ(SOUTH_CHICKEN1); > > +} > > ooh, this even makes the sequence of two writes sound sensible. > > Reviewed-by: Keith Packard > > You didn't happen to check the register values after doing this, did > you? Just to verify that all of the crazy math works, given that we > can't actually test whether this fixes anything. > Tricky. I need to call this in the gen6 and ivb training routines rather than the ilk one... Bits seem to be getting set correctly with the last patch. -- Jesse Barnes, Intel Open Source Technology Center