From: Wei Wang2 <wei.wang2@amd.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: "xen-devel@lists.xensource.com" <xen-devel@lists.xensource.com>
Subject: Re: [PATCH, RFC 5/7] PCI multi-seg: AMD-IOMMU specificadjustments
Date: Tue, 6 Sep 2011 13:03:11 +0200 [thread overview]
Message-ID: <201109061303.11919.wei.wang2@amd.com> (raw)
In-Reply-To: <4E64E7BE0200007800054AD6@nat28.tlf.novell.com>
On Monday 05 September 2011 15:16:14 Jan Beulich wrote:
> I don't really follow: The two cases where I can't spot where to get the
> segment number from are register_exclusion_range_for_all_devices()
> and register_exclusion_range_for_device(), both called in the context
> of struct acpi_ivmd_block_header(), which only gets a struct
> acpi_ivmd_block_header (not having a segment number afaict).
OK, now I understand your question. I thought you are question about iommu
specification. For these two functions, I think seg = 0 is fine, since amd
iommu does not support multiple pci segment other than 0. Also, You could
pass acpi_ivhd_block_header to parse_ivmd_block() in function
parse_ivrs_block(), since both ivhd and ivmd entries shares the same ivhd
header.
Thanks,
Wei
next prev parent reply other threads:[~2011-09-06 11:03 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-08-25 14:58 [PATCH, RFC 5/7] PCI multi-seg: AMD-IOMMU specific adjustments Jan Beulich
2011-08-26 11:57 ` Wei Wang2
2011-09-05 13:16 ` [PATCH,RFC 5/7] PCI multi-seg: AMD-IOMMU specificadjustments Jan Beulich
2011-09-06 11:03 ` Wei Wang2 [this message]
2011-09-06 11:47 ` Jan Beulich
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