All of lore.kernel.org
 help / color / mirror / Atom feed
From: Richard Kuo <rkuo@codeaurora.org>
To: linux-arch@vger.kernel.org, linux-hexagon@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: Arnd Bergmann <arnd@arndb.de>
Subject: [patch v3 26/36] Hexagon: Implement basic TLB management routines for Hexagon.
Date: Thu, 08 Sep 2011 20:09:13 -0500	[thread overview]
Message-ID: <20110909010917.185401584@codeaurora.org> (raw)
In-Reply-To: 20110909010847.294039464@codeaurora.org

[-- Attachment #1: tlb.diff --]
[-- Type: text/plain, Size: 7777 bytes --]

Mostly all stubs, as the TLB is managed by the hypervisor.

Signed-off-by: Richard Kuo <rkuo@codeaurora.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>

---
 arch/hexagon/include/asm/tlb.h      |   39 +++++++++++++++
 arch/hexagon/include/asm/tlbflush.h |   58 ++++++++++++++++++++++
 arch/hexagon/mm/vm_tlb.c            |   93 ++++++++++++++++++++++++++++++++++++
 3 files changed, 190 insertions(+)

Index: linux-hexagon-kernel/arch/hexagon/include/asm/tlbflush.h
===================================================================
--- /dev/null	1970-01-01 00:00:00.000000000 +0000
+++ linux-hexagon-kernel/arch/hexagon/include/asm/tlbflush.h	2011-09-03 20:14:59.754981475 -0500
@@ -0,0 +1,58 @@
+/*
+ * TLB flush support for Hexagon
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_TLBFLUSH_H
+#define _ASM_TLBFLUSH_H
+
+#include <linux/mm.h>
+#include <asm/processor.h>
+
+/*
+ * TLB flushing -- in "SMP", these routines get defined to be the
+ * ones from smp.c, else they are some local flavors.
+ */
+
+/*
+ * These functions are commonly macros, but in the interests of
+ * VM vs. native implementation and code size, we simply declare
+ * the function prototypes here.
+ */
+extern void tlb_flush_all(void);
+extern void flush_tlb_mm(struct mm_struct *mm);
+extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr);
+extern void flush_tlb_range(struct vm_area_struct *vma,
+				unsigned long start, unsigned long end);
+extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
+extern void flush_tlb_one(unsigned long);
+
+/*
+ * "This is called in munmap when we have freed up some page-table pages.
+ * We don't need to do anything here..."
+ *
+ * The VM kernel doesn't walk page tables, and they are passed to the VMM
+ * by logical address. There doesn't seem to be any possibility that they
+ * could be referenced by the VM kernel based on a stale mapping, since
+ * they would only be located by consulting the mm structure, and they
+ * will have been purged from that structure by the munmap.  Seems like
+ * a noop on HVM as well.
+ */
+#define flush_tlb_pgtables(mm, start, end)
+
+#endif
Index: linux-hexagon-kernel/arch/hexagon/include/asm/tlb.h
===================================================================
--- /dev/null	1970-01-01 00:00:00.000000000 +0000
+++ linux-hexagon-kernel/arch/hexagon/include/asm/tlb.h	2011-09-03 20:14:59.754981475 -0500
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_TLB_H
+#define _ASM_TLB_H
+
+#include <linux/pagemap.h>
+#include <asm/tlbflush.h>
+
+/*
+ * We don't need any special per-pte or per-vma handling...
+ */
+#define tlb_start_vma(tlb, vma)				do { } while (0)
+#define tlb_end_vma(tlb, vma)				do { } while (0)
+#define __tlb_remove_tlb_entry(tlb, ptep, address)	do { } while (0)
+
+/*
+ * .. because we flush the whole mm when it fills up
+ */
+#define tlb_flush(tlb)		flush_tlb_mm((tlb)->mm)
+
+#include <asm-generic/tlb.h>
+
+#endif
Index: linux-hexagon-kernel/arch/hexagon/mm/vm_tlb.c
===================================================================
--- /dev/null	1970-01-01 00:00:00.000000000 +0000
+++ linux-hexagon-kernel/arch/hexagon/mm/vm_tlb.c	2011-09-03 20:14:59.754981475 -0500
@@ -0,0 +1,93 @@
+/*
+ * Hexagon Virtual Machine TLB functions
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+/*
+ * The Hexagon Virtual Machine conceals the real workings of
+ * the TLB, but there are one or two functions that need to
+ * be instantiated for it, differently from a native build.
+ */
+#include <linux/mm.h>
+#include <asm/page.h>
+#include <asm/hexagon_vm.h>
+
+/*
+ * Initial VM implementation has only one map active at a time, with
+ * TLB purgings on changes.  So either we're nuking the current map,
+ * or it's a no-op.  This operation is messy on true SMPs where other
+ * processors must be induced to flush the copies in their local TLBs,
+ * but Hexagon thread-based virtual processors share the same MMU.
+ */
+void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
+			unsigned long end)
+{
+	struct mm_struct *mm = vma->vm_mm;
+
+	if (mm->context.ptbase == current->active_mm->context.ptbase)
+		__vmclrmap((void *)start, end - start);
+}
+
+/*
+ * Flush a page from the kernel virtual map - used by highmem
+ */
+void flush_tlb_one(unsigned long vaddr)
+{
+	__vmclrmap((void *)vaddr, PAGE_SIZE);
+}
+
+/*
+ * Flush all TLBs across all CPUs, virtual or real.
+ * A single Hexagon core has 6 thread contexts but
+ * only one TLB.
+ */
+void tlb_flush_all(void)
+{
+	/*  should probably use that fixaddr end or whateve label  */
+	__vmclrmap(0, 0xffff0000);
+}
+
+/*
+ * Flush TLB entries associated with a given mm_struct mapping.
+ */
+void flush_tlb_mm(struct mm_struct *mm)
+{
+	/* Current Virtual Machine has only one map active at a time */
+	if (current->active_mm->context.ptbase == mm->context.ptbase)
+		tlb_flush_all();
+}
+
+/*
+ * Flush TLB state associated with a page of a vma.
+ */
+void flush_tlb_page(struct vm_area_struct *vma, unsigned long vaddr)
+{
+	struct mm_struct *mm = vma->vm_mm;
+
+	if (mm->context.ptbase  == current->active_mm->context.ptbase)
+		__vmclrmap((void *)vaddr, PAGE_SIZE);
+}
+
+/*
+ * Flush TLB entries associated with a kernel address range.
+ * Like flush range, but without the check on the vma->vm_mm.
+ */
+void flush_tlb_kernel_range(unsigned long start, unsigned long end)
+{
+		__vmclrmap((void *)start, end - start);
+}

--

Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

  parent reply	other threads:[~2011-09-09  1:09 UTC|newest]

Thread overview: 75+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-09-09  1:08 [patch v3 00/36] Hexagon: Add support for Qualcomm Hexagon architecture Richard Kuo
2011-09-09  1:08 ` [patch v3 01/36] Hexagon: Add generic headers Richard Kuo
2011-09-09  1:08 ` [patch v3 02/36] Hexagon: Core arch-specific header files Richard Kuo
2011-09-09  1:08 ` [patch v3 03/36] Hexagon: Add bitops support Richard Kuo
2011-09-09  1:08 ` [patch v3 04/36] Hexagon: Add atomic ops support Richard Kuo
2011-09-09  1:08 ` [patch v3 05/36] Hexagon: Add syscalls Richard Kuo
2011-09-09  8:05   ` Arnd Bergmann
2011-09-09  1:08 ` [patch v3 06/36] Hexagon: Add processor and system headers Richard Kuo
2011-09-09  1:08 ` [patch v3 07/36] Hexagon: Add threadinfo Richard Kuo
2011-09-09  1:08 ` [patch v3 08/36] Hexagon: Add delay functions Richard Kuo
2011-09-09  8:07   ` Arnd Bergmann
2011-09-09  1:08 ` [patch v3 09/36] Hexagon: Add checksum functions Richard Kuo
2011-09-09  1:08 ` [patch v3 10/36] Hexagon: Add memcpy and memset accelerated functions Richard Kuo
2011-09-09  1:08 ` [patch v3 11/36] Hexagon: Add hypervisor interface Richard Kuo
2011-09-09  1:08 ` [patch v3 12/36] Hexagon: Export ksyms defined in assembly files Richard Kuo
2011-09-09  1:09 ` [patch v3 13/36] Hexagon: Support dynamic module loading Richard Kuo
2011-09-09  1:09 ` [patch v3 14/36] Hexagon: Add signal functions Richard Kuo
2011-09-09  8:12   ` Arnd Bergmann
2011-09-11 14:59   ` Benjamin Herrenschmidt
2011-09-09  1:09 ` [patch v3 15/36] Hexagon: Add init_task and process functions Richard Kuo
2011-09-09  1:09 ` [patch v3 16/36] Hexagon: Add startup code Richard Kuo
2011-09-09  1:09 ` [patch v3 17/36] Hexagon: Add interrupts Richard Kuo
2011-09-09 13:04   ` Thomas Gleixner
2011-09-09 18:57   ` Linas Vepstas (Code Aurora)
2011-09-09  1:09 ` [patch v3 18/36] Hexagon: Add time and timer functions Richard Kuo
2011-09-09  8:23   ` Arnd Bergmann
2011-09-09 13:13   ` Thomas Gleixner
2011-09-09  1:09 ` [patch v3 19/36] Hexagon: Add ptrace support Richard Kuo
2011-09-09  8:15   ` Arnd Bergmann
2011-09-09 20:15   ` Jonas Bonn
2011-09-09 20:15     ` Jonas Bonn
2011-09-09 21:18     ` Linas Vepstas (Code Aurora)
2011-09-10  6:42       ` Jonas Bonn
2011-09-10  6:42         ` Jonas Bonn
2011-09-10 11:21         ` Arnd Bergmann
2011-09-10 11:29         ` Pedro Alves
2011-09-19 15:25           ` Linas Vepstas (Code Aurora)
2011-09-21 16:15             ` Pedro Alves
2011-09-21 17:50               ` Linas Vepstas (Code Aurora)
2011-09-21 18:04                 ` Pedro Alves
2011-09-09  1:09 ` [patch v3 20/36] Hexagon: Provide basic debugging and system trap support Richard Kuo
2011-09-09  1:09 ` [patch v3 21/36] Hexagon: Add SMP support Richard Kuo
2011-09-09  8:16   ` Arnd Bergmann
2011-09-09 13:24   ` Thomas Gleixner
2011-09-11 14:51   ` Benjamin Herrenschmidt
2011-09-12 23:38     ` Richard Kuo
2011-09-09  1:09 ` [patch v3 22/36] Hexagon: Add locking types and functions Richard Kuo
2011-09-09  8:17   ` Arnd Bergmann
2011-09-09  1:09 ` [patch v3 23/36] Hexagon: Add user access functions Richard Kuo
2011-09-09  1:09 ` [patch v3 24/36] Hexagon: Provide basic implementation and/or stubs for I/O routines Richard Kuo
2011-09-09  8:18   ` Arnd Bergmann
2011-09-09 19:14   ` Linas Vepstas (Code Aurora)
2011-09-09 21:13     ` Arnd Bergmann
2011-09-10 20:02       ` Taylor Simpson
2011-09-10 20:02         ` Taylor Simpson
2011-09-10 20:02         ` Taylor Simpson
2011-09-11 14:46         ` Benjamin Herrenschmidt
2011-09-09  1:09 ` [patch v3 25/36] Hexagon: Implement basic cache-flush support Richard Kuo
2011-09-09  1:09 ` Richard Kuo [this message]
2011-09-09  1:09 ` [patch v3 27/36] Hexagon: Provide DMA implementation Richard Kuo
2011-09-09  1:09 ` [patch v3 28/36] Hexagon: Add ioremap support Richard Kuo
2011-09-09  8:19   ` Arnd Bergmann
2011-09-09  1:09 ` [patch v3 29/36] Hexagon: Add page table header files & etc Richard Kuo
2011-09-09  8:20   ` Arnd Bergmann
2011-09-09  1:09 ` [patch v3 30/36] Hexagon: Add page-fault support Richard Kuo
2011-09-11 15:08   ` Benjamin Herrenschmidt
2011-09-13  1:34     ` Richard Kuo
2011-09-09  1:09 ` [patch v3 31/36] Hexagon: kgdb support files Richard Kuo
2011-09-09  1:09 ` [patch v3 32/36] Hexagon: Comet platform support Richard Kuo
2011-09-09  1:09 ` [patch v3 33/36] Hexagon: Add configuration and makefiles for the Hexagon architecture Richard Kuo
2011-09-09  1:09 ` [patch v3 34/36] Hexagon: Add basic stacktrace functionality for " Richard Kuo
2011-09-09  1:09 ` [patch v3 35/36] Hexagon: Add self to MAINTAINERS Richard Kuo
2011-09-09  8:21   ` Arnd Bergmann
2011-09-09  1:09 ` [patch v3 36/36] Add extra arch overrides to asm-generic/checksum.h Richard Kuo
2011-09-09  8:39 ` [patch v3 00/36] Hexagon: Add support for Qualcomm Hexagon architecture Arnd Bergmann

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20110909010917.185401584@codeaurora.org \
    --to=rkuo@codeaurora.org \
    --cc=arnd@arndb.de \
    --cc=linux-arch@vger.kernel.org \
    --cc=linux-hexagon@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.