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From: Robert Richter <robert.richter@amd.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Ingo Molnar <mingo@elte.hu>,
	Stephane Eranian <eranian@google.com>,
	LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 4/7] perf, x86: Implement IBS interrupt handler
Date: Wed, 21 Sep 2011 10:39:51 +0200	[thread overview]
Message-ID: <20110921083951.GY6063@erda.amd.com> (raw)
In-Reply-To: <1316016805.5040.34.camel@twins>

On 14.09.11 12:13:25, Peter Zijlstra wrote:
> On Wed, 2011-09-07 at 18:36 +0200, Robert Richter wrote:
> > +       if (event->attr.sample_type & PERF_SAMPLE_RAW) {
> > +               ibs_data.caps = ibs_caps;
> > +               size = 1;
> > +               offset = 1;
> > +               do {
> > +                   rdmsrl(msr + offset, *buf++);
> > +                   size++;
> > +                   offset = find_next_bit(perf_ibs->offset_mask,
> > +                                          perf_ibs->offset_max,
> > +                                          offset + 1);
> > +               } while (offset < perf_ibs->offset_max);
> > +               raw.size = sizeof(u32) + sizeof(u64) * size;
> > +               raw.data = ibs_data.data;
> > +               data.raw = &raw;
> > +       } 
> 
> Another application of for_each_set_bit_continue() ?

Peter, I will make this a separate patch set to decouple from this
patch set. Will then update this code too. So in my next ibs patch set
I wont change this here.

-Robert

-- 
Advanced Micro Devices, Inc.
Operating System Research Center


  reply	other threads:[~2011-09-21  8:40 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-09-07 16:36 [PATCH 0/7 -v2] perf, x86: Implement AMD IBS Robert Richter
2011-09-07 16:36 ` [PATCH 1/7] perf, x86: share IBS macros between perf and oprofile Robert Richter
2011-09-07 16:36 ` [PATCH 2/7] perf, x86: Implement IBS initialization Robert Richter
2011-09-07 16:36 ` [PATCH 3/7] perf, x86: Implement IBS event configuration Robert Richter
2011-09-14 15:35   ` Peter Zijlstra
2011-09-07 16:36 ` [PATCH 4/7] perf, x86: Implement IBS interrupt handler Robert Richter
2011-09-14 16:13   ` Peter Zijlstra
2011-09-21  8:39     ` Robert Richter [this message]
2011-09-07 16:36 ` [PATCH 5/7] perf, x86: Implement IBS pmu control ops Robert Richter
2011-09-07 16:36 ` [PATCH 6/7] perf, x86: Implement 64 bit counter support for IBS Robert Richter
2011-09-07 16:36 ` [PATCH 7/7] perf, x86: Example code for AMD IBS Robert Richter
  -- strict thread matches above, loose matches on Subject: below --
2011-07-28 13:46 [PATCH 0/7] perf, x86: Implement " Robert Richter
2011-07-28 13:46 ` [PATCH 4/7] perf, x86: Implement IBS interrupt handler Robert Richter
2011-07-29 16:58   ` Peter Zijlstra
2011-08-01  5:32     ` Robert Richter
2011-08-01 15:21       ` Peter Zijlstra
2011-08-01 16:38         ` Don Zickus
2011-08-05  9:55           ` Ingo Molnar
2011-08-05 13:47             ` Don Zickus
2011-08-02 11:43   ` Peter Zijlstra
2011-08-12 18:07     ` Robert Richter

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