diff for duplicates of <20110921142425.GE2872@arm.com> diff --git a/a/1.txt b/N1/1.txt index 9085e95..ecc7658 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -13,11 +13,11 @@ On Wed, Sep 21, 2011 at 08:24:24AM -0500, Rob Herring wrote: > > For now, clocks and timers are not handled via the device tree. > > Implementation of these can follow in later patches. > > -> > Thanks to Lorenzo Pieralisi, Grant Likely and Pawe? Moll for their +> > Thanks to Lorenzo Pieralisi, Grant Likely and Paweł Moll for their > > help and contributions. > > > > Signed-off-by: Dave Martin <dave.martin@linaro.org> -> > Acked-by: Pawe? Moll <Pawel.Moll@arm.com> +> > Acked-by: Paweł Moll <Pawel.Moll@arm.com> > > --- > > > > There are some outstanding issues which need to be discussed, listed @@ -131,7 +131,7 @@ OK, I'll try to propose documentation for these: > > multiple core-tiles int the same kernel. It well need to get fixed > > later, when extra core tile support is merged (or before). > > -> > Pawe? Moll is looking into this separately. +> > Paweł Moll is looking into this separately. > > > > * The Kconfig logic for ensuring that at least one boot protocol and > > at least one core tile are selected is a bit ugly. Suggestions for @@ -188,20 +188,20 @@ OK, I'll try to propose documentation for these: > > + #size-cells = <1>; > > + #interrupt-cells = <1>; > > + -> > + flash at 0,00000000 { +> > + flash@0,00000000 { > > + compatible = "arm,vexpress-flash", "cfi-flash"; > > + reg = <0 0x00000000 0x04000000 > > + 1 0x00000000 0x04000000>; > > + bank-width = <4>; > > + }; > > + -> > + psram at 2,00000000 { +> > + psram@2,00000000 { > > + compatible = "mtd-ram"; > > + reg = <2 0x00000000 0x02000000>; > > + bank-width = <4>; > > + }; > > + -> > + ethernet at 3,02000000 { +> > + ethernet@3,02000000 { > > + compatible = "smsc,lan9118", "smsc,lan9115"; > > + reg = <3 0x02000000 0x10000>; > > + reg-io-width = <4>; @@ -210,89 +210,89 @@ OK, I'll try to propose documentation for these: > > + smsc,irq-push-pull; > > + }; > > + -> > + usb at 3,03000000 { +> > + usb@3,03000000 { > > + compatible = "nxp,usb-isp1761"; > > + reg = <3 0x03000000 0x20000>; > > + interrupts = <16>; > > + port1-otg; > > + }; > > + -> > + peripherals at 7,00000000 { +> > + peripherals@7,00000000 { > > + compatible = "arm,amba-bus", "simple-bus"; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + ranges = <0 7 0 0x20000>; > > + > > + // PCI-E I2C bus -> > + i2c0: i2c at 02000 { +> > + i2c0: i2c@02000 { > > + compatible = "arm,versatile-i2c"; > > + reg = <0x02000 0x1000>; > > + > > + #address-cells = <1>; > > + #size-cells = <0>; > > + -> > + pcie-switch at 60 { +> > + pcie-switch@60 { > > + compatible = "idt,89hpes32h8"; > > + reg = <0x60>; > > + }; > > + }; > > + -> > + aaci at 04000 { +> > + aaci@04000 { > > + compatible = "arm,pl041", "arm,primecell"; > > + reg = <0x04000 0x1000>; > > + interrupts = <11>; > > + }; > > + -> > + mmci at 05000 { +> > + mmci@05000 { > > + compatible = "arm,pl180", "arm,primecell"; > > + reg = <0x05000 0x1000>; > > + interrupts = <9 10>; > > + }; > > + -> > + kmi at 06000 { +> > + kmi@06000 { > > + compatible = "arm,pl050", "arm,primecell"; > > + reg = <0x06000 0x1000>; > > + interrupts = <12>; > > + }; > > + -> > + kmi at 07000 { +> > + kmi@07000 { > > + compatible = "arm,pl050", "arm,primecell"; > > + reg = <0x07000 0x1000>; > > + interrupts = <13>; > > + }; > > + -> > + uart0: uart at 09000 { +> > + uart0: uart@09000 { > > + compatible = "arm,pl011", "arm,primecell"; > > + reg = <0x09000 0x1000>; > > + interrupts = <5>; > > + }; > > + -> > + uart1: uart at 0a000 { +> > + uart1: uart@0a000 { > > + compatible = "arm,pl011", "arm,primecell"; > > + reg = <0x0a000 0x1000>; > > + interrupts = <6>; > > + }; > > + -> > + uart2: uart at 0b000 { +> > + uart2: uart@0b000 { > > + compatible = "arm,pl011", "arm,primecell"; > > + reg = <0x0b000 0x1000>; > > + interrupts = <7>; > > + }; > > + -> > + uart3: uart at 0c000 { +> > + uart3: uart@0c000 { > > + compatible = "arm,pl011", "arm,primecell"; > > + reg = <0x0c000 0x1000>; > > + interrupts = <8>; > > + }; > > + -> > + wdt at 0f000 { +> > + wdt@0f000 { > > + compatible = "arm,sp805", "arm,primecell"; > > + reg = <0x0f000 0x1000>; > > + interrupts = <0>; > > + }; > > + > > + // Timer init is hardcoded in v2m_timer_init(), for now. -> > + // timer at 11000 { +> > + // timer@11000 { > > + // compatible = "arm,arm-sp804"; > > arm,sp804 is more consistent. I believe the sp804 does have the periphid @@ -309,9 +309,400 @@ actually making use of these entries yet. > > + // interrupts = <2>; > > + // }; > > + -> > + // timer at 12000 { +> > + // timer@12000 { > > + // compatible = "arm,arm-sp804"; > > + // reg = <0x12000 0x1000>; > > + // }; > > Just because Linux is not using it, doesn't mean you should comment it out. + +From the point of view of describing the hardware, yes. However, I was +a bit worried that if sp804 is turned into a full driver, it will get +initialised twice -- once explicitly and once in of_platform_populate()... +at least until the baord code is adapted to work properly with the new +driver. + +Commenting these entries out for now seemed a good idea to avoid the flag-day +hazard. Am I being too cautious? + +> +> > + +> > + // DVI I2C bus (DDC) +> > + i2c1: i2c@16000 { +> > + compatible = "arm,versatile-i2c"; +> > + reg = <0x16000 0x1000>; +> > + +> > + #address-cells = <1>; +> > + #size-cells = <0>; +> > + +> > + edid@50 { +> > + compatible = "edid"; +> > + reg = <0x50>; +> > + }; +> > + }; +> > + +> > + rtc@17000 { +> > + compatible = "arm,pl031", "arm,primecell"; +> > + reg = <0x017000 0x1000>; +> > + interrupts = <4>; +> > + }; +> > + +> > + compact-flash@1a000 { +> > + compatible = "ata-generic"; +> > + reg = <0x1a000 0x100 +> > + 0x1a100 0xf00>; +> > + reg-shift = <2>; +> > + }; +> > + }; +> > + }; +> > +}; +> > diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts +> > new file mode 100644 +> > index 0000000..059be97 +> > --- /dev/null +> > +++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts +> > @@ -0,0 +1,80 @@ +> > +// ARM Ltd. Versatile Express Corex-A9 (Quad Core) Core Tile V2P-CA9 (HBI-0191B) +> > + +> > +/dts-v1/; +> > + +> > +/include/ "skeleton.dtsi" +> > + +> > +/ { +> > + model = "ARM Versatile Express (Cortex-A9 Quad Core Tile)"; +> > + compatible = "arm,vexpress-v2p-ca9", "arm,vexpress"; +> > + interrupt-parent = <&intc>; +> > + +> > + memory { +> > + device_type = "memory"; +> > + reg = <0x60000000 0x40000000>; +> > + }; +> > + +> > + intc: interrupt-controller@1e001000 { +> > + compatible = "arm,cortex-a9-gic"; +> > + #interrupt-cells = <2>; +> > + #address-cells = <0>; +> > + interrupt-controller; +> > + reg = <0x1e001000 0x1000>, +> > + <0x1e000100 0x100>; +> > + }; +> +> Is this really all by itself? It should be in the sub-tree of the +> appropriate bus. + +Hmmm, yes. I guess I got away with this due to not using the proper GIC +bindings yet (and not declaring the other core-tile peripherals). + +> You need an "interrupt-parent;" line so the parent is not itself. + +Do you mean for the bus? + +> +> > + +> > + motherboard { +> > + ranges = <0 0 0x40000000 0x04000000 +> > + 1 0 0x44000000 0x04000000 +> > + 2 0 0x48000000 0x04000000 +> > + 3 0 0x4c000000 0x04000000 +> > + 7 0 0x10000000 0x00020000>; +> > + +> > + interrupt-map-mask = <0 0 63>; +> > + interrupt-map = <0 0 0 &intc 32 8 + +^ This should be ... 4 btw (thanks to Pawel for spotting that) + +> > + 0 0 1 &intc 33 4 +> > + 0 0 2 &intc 34 4 +> > + 0 0 3 &intc 35 4 +> > + 0 0 4 &intc 36 4 +> > + 0 0 5 &intc 37 4 +> > + 0 0 6 &intc 38 4 +> > + 0 0 7 &intc 39 4 +> > + 0 0 8 &intc 40 4 +> > + 0 0 9 &intc 41 4 +> > + 0 0 10 &intc 42 4 +> > + 0 0 11 &intc 43 4 +> > + 0 0 12 &intc 44 4 +> > + 0 0 13 &intc 45 4 +> > + 0 0 14 &intc 46 4 +> > + 0 0 15 &intc 47 4 +> > + 0 0 16 &intc 48 4 +> > + 0 0 17 &intc 49 4 +> > + 0 0 18 &intc 50 4 +> > + 0 0 19 &intc 51 4 +> > + 0 0 20 &intc 52 4 +> > + 0 0 21 &intc 53 4 +> > + 0 0 22 &intc 54 4 +> > + 0 0 23 &intc 55 4 +> > + 0 0 24 &intc 56 4 +> > + 0 0 25 &intc 57 4 +> > + 0 0 26 &intc 58 4 +> > + 0 0 27 &intc 59 4 +> > + 0 0 28 &intc 60 4 +> > + 0 0 29 &intc 61 4 +> > + 0 0 30 &intc 62 4 +> > + 0 0 31 &intc 63 4 +> > + 0 0 32 &intc 64 4 +> > + 0 0 33 &intc 65 4 +> > + 0 0 34 &intc 66 4 +> > + 0 0 35 &intc 67 4 +> > + 0 0 36 &intc 68 4 +> > + 0 0 37 &intc 69 4 +> > + 0 0 38 &intc 70 4 +> > + 0 0 39 &intc 71 4 +> > + 0 0 40 &intc 72 4 +> > + 0 0 41 &intc 73 4 +> > + 0 0 42 &intc 74 4>; +> > + }; +> > +}; +> > + +> > +/include/ "vexpress-v2m-legacy.dtsi" +> > diff --git a/arch/arm/configs/vexpress_defconfig b/arch/arm/configs/vexpress_defconfig +> > index f2de51f..6c3c5f6 100644 +> > --- a/arch/arm/configs/vexpress_defconfig +> > +++ b/arch/arm/configs/vexpress_defconfig +> > @@ -22,6 +22,7 @@ CONFIG_MODULE_UNLOAD=y +> > # CONFIG_IOSCHED_DEADLINE is not set +> > # CONFIG_IOSCHED_CFQ is not set +> > CONFIG_ARCH_VEXPRESS=y +> > +CONFIG_ARCH_VEXPRESS_ATAGS=y +> > CONFIG_ARCH_VEXPRESS_CA9X4=y +> > # CONFIG_SWP_EMULATE is not set +> > CONFIG_SMP=y +> > diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig +> > index 9311484..ea64630 100644 +> > --- a/arch/arm/mach-vexpress/Kconfig +> > +++ b/arch/arm/mach-vexpress/Kconfig +> > @@ -1,12 +1,55 @@ +> > menu "Versatile Express platform type" +> > depends on ARCH_VEXPRESS +> > +> > +# ARCH_VEXPRESS ensures a sane minimal config is selected by selecting +> > +# ARCH_VEXPRESS_SANE_CONFIG. +> > +# Extend the logic here when adding new core tiles. +> > + +> > +config ARCH_VEXPRESS_SANE_CONFIG +> > + bool +> > + select ARCH_VEXPRESS_CA9X4 +> > + select ARCH_VEXPRESS_ATAGS if !ARCH_VEXPRESS_DT +> > + +> > + +> > +comment "At least one boot type must be selected" +> > + +> > +config ARCH_VEXPRESS_ATAGS +> > + bool "Boot via ATAGs" +> > + default y +> > + help +> > + This option enables support for the board using the standard +> > + ATAGs boot protocol. +> > + +> > + If your bootloader supports FDT-based booting and you do not +> > + intend ever to boot via the traditional ATAGs method, you can say +> > + N here. +> > + +> > +config ARCH_VEXPRESS_DT +> > + bool "Boot via Device Tree" +> > + select USE_OF +> > + help +> > + This option enables support for the board, and enables booting +> > + via a Flattened Device Tree provided by the bootloader. +> > + +> > + If your bootloader supports FDT-based booting, you can say Y +> > + here, otherwise, say N. +> > + +> > + +> > +# Core Tile support options +> > + +> > +comment "At least one core tile must be selected" +> > + +> > config ARCH_VEXPRESS_CA9X4 +> > - bool "Versatile Express Cortex-A9x4 tile" +> > + bool "Versatile Express Cortex-A9x4 Core Tile" +> > + default y +> > select CPU_V7 +> > select ARM_GIC +> > select ARM_ERRATA_720789 +> > select ARM_ERRATA_751472 +> > select ARM_ERRATA_753970 +> > + help +> > + Include support for the Cortex-A9x4 Core Tile (HBI-0191B). +> > + +> > + If unsure, say Y. +> > +> > endmenu +> > diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c +> > index bfd32f5..e2fe2c9 100644 +> > --- a/arch/arm/mach-vexpress/ct-ca9x4.c +> > +++ b/arch/arm/mach-vexpress/ct-ca9x4.c +> > @@ -9,6 +9,7 @@ +> > #include <linux/amba/bus.h> +> > #include <linux/amba/clcd.h> +> > #include <linux/clkdev.h> +> > +#include <linux/irqdomain.h> +> > +> > #include <asm/hardware/arm_timer.h> +> > #include <asm/hardware/cache-l2x0.h> +> > @@ -59,10 +60,16 @@ static void __init ct_ca9x4_map_io(void) +> > iotable_init(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc)); +> > } +> > +> > +static const struct of_device_id gic_of_match[] __initconst = { +> > + { .compatible = "arm,cortex-a9-gic", }, +> > + {} +> > +}; +> > + +> > static void __init ct_ca9x4_init_irq(void) +> > { +> > gic_init(0, 29, MMIO_P2V(A9_MPCORE_GIC_DIST), +> > MMIO_P2V(A9_MPCORE_GIC_CPU)); +> > + irq_domain_generate_simple(gic_of_match, A9_MPCORE_GIC_DIST, 0); +> > } +> > +> > #if 0 +> > diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c +> > index 9e6b93b..6defce6 100644 +> > --- a/arch/arm/mach-vexpress/v2m.c +> > +++ b/arch/arm/mach-vexpress/v2m.c +> > @@ -6,6 +6,8 @@ +> > #include <linux/amba/mmci.h> +> > #include <linux/io.h> +> > #include <linux/init.h> +> > +#include <linux/of_irq.h> +> > +#include <linux/of_platform.h> +> > #include <linux/platform_device.h> +> > #include <linux/ata_platform.h> +> > #include <linux/smsc911x.h> +> > @@ -118,7 +120,7 @@ int v2m_cfg_read(u32 devfn, u32 *data) +> > return !!(val & SYS_CFG_ERR); +> > } +> > +> > - +> > +#ifdef CONFIG_ARCH_VEXPRESS_ATAGS +> > static struct resource v2m_pcie_i2c_resource = { +> > .start = V2M_SERIAL_BUS_PCI, +> > .end = V2M_SERIAL_BUS_PCI + SZ_4K - 1, +> > @@ -200,6 +202,7 @@ static struct platform_device v2m_usb_device = { +> > .num_resources = ARRAY_SIZE(v2m_usb_resources), +> > .dev.platform_data = &v2m_usb_config, +> > }; +> > +#endif /* CONFIG_ARCH_VEXPRESS_ATAGS */ +> > +> > static void v2m_flash_set_vpp(struct platform_device *pdev, int on) +> > { +> > @@ -211,6 +214,7 @@ static struct physmap_flash_data v2m_flash_data = { +> > .set_vpp = v2m_flash_set_vpp, +> > }; +> > +> > +#ifdef CONFIG_ARCH_VEXPRESS_ATAGS +> > static struct resource v2m_flash_resources[] = { +> > { +> > .start = V2M_NOR0, +> > @@ -254,6 +258,7 @@ static struct platform_device v2m_cf_device = { +> > .num_resources = ARRAY_SIZE(v2m_pata_resources), +> > .dev.platform_data = &v2m_pata_data, +> > }; +> > +#endif /* CONFIG_ARCH_VEXPRESS_ATAGS */ +> > +> > static unsigned int v2m_mmci_status(struct device *dev) +> > { +> > @@ -265,6 +270,7 @@ static struct mmci_platform_data v2m_mmci_data = { +> > .status = v2m_mmci_status, +> > }; +> > +> > +#ifdef CONFIG_ARCH_VEXPRESS_ATAGS +> > static AMBA_DEVICE(aaci, "mb:aaci", V2M_AACI, NULL); +> > static AMBA_DEVICE(mmci, "mb:mmci", V2M_MMCI, &v2m_mmci_data); +> > static AMBA_DEVICE(kmi0, "mb:kmi0", V2M_KMI0, NULL); +> > @@ -288,6 +294,7 @@ static struct amba_device *v2m_amba_devs[] __initdata = { +> > &wdt_device, +> > &rtc_device, +> > }; +> > +#endif /* CONFIG_ARCH_VEXPRESS_ATAGS */ +> > +> > +> > static long v2m_osc_round(struct clk *clk, unsigned long rate) +> > @@ -415,6 +422,8 @@ static void __init v2m_init_irq(void) +> > ct_desc->init_irq(); +> > } +> > +> > + +> > +#ifdef CONFIG_ARCH_VEXPRESS_ATAGS +> > static void __init v2m_init(void) +> > { +> > int i; +> > @@ -443,3 +452,46 @@ MACHINE_START(VEXPRESS, "ARM-Versatile Express") +> > .timer = &v2m_timer, +> > .init_machine = v2m_init, +> > MACHINE_END +> > +#endif /* CONFIG_ARCH_VEXPRESS_ATAGS */ +> > + +> > +#ifdef CONFIG_ARCH_VEXPRESS_DT +> > +struct of_dev_auxdata v2m_dt_auxdata_lookup[] __initdata = { +> > + OF_DEV_AUXDATA("arm,vexpress-flash", V2M_NOR0, "physmap-flash", &v2m_flash_data), +> > + OF_DEV_AUXDATA("arm,primecell", V2M_AACI, "mb:aaci", NULL), +> > + OF_DEV_AUXDATA("arm,primecell", V2M_WDT, "mb:wdt", NULL), +> > + OF_DEV_AUXDATA("arm,primecell", V2M_MMCI, "mb:mmci", &v2m_mmci_data), +> > + OF_DEV_AUXDATA("arm,primecell", V2M_KMI0, "mb:kmi0", NULL), +> > + OF_DEV_AUXDATA("arm,primecell", V2M_KMI1, "mb:kmi1", NULL), +> > + OF_DEV_AUXDATA("arm,primecell", V2M_UART0, "mb:uart0", NULL), +> > + OF_DEV_AUXDATA("arm,primecell", V2M_UART1, "mb:uart1", NULL), +> > + OF_DEV_AUXDATA("arm,primecell", V2M_UART2, "mb:uart2", NULL), +> > + OF_DEV_AUXDATA("arm,primecell", V2M_UART3, "mb:uart3", NULL), +> > + OF_DEV_AUXDATA("arm,primecell", V2M_RTC, "mb:rtc", NULL), +> > + {} +> > +}; +> > + +> > +static void __init v2m_dt_init(void) +> > +{ +> > + of_platform_populate(NULL, of_default_bus_match_table, +> > + v2m_dt_auxdata_lookup, NULL); +> > + +> > + pm_power_off = v2m_power_off; +> > + arm_pm_restart = v2m_restart; +> > + +> > + ct_desc->init_tile(); +> > +} +> > + +> > +static const char *v2m_dt_match[] __initconst = { +> > + "arm,vexpress", +> > + NULL, +> > +}; +> > + +> > +DT_MACHINE_START(VEXPRESS_DT, "ARM Versatile Express") +> > + .map_io = v2m_map_io, +> > + .init_early = v2m_init_early, +> > + .init_irq = v2m_init_irq, +> > + .timer = &v2m_timer, +> > + .init_machine = v2m_dt_init, +> > + .dt_compat = v2m_dt_match, +> > +MACHINE_END +> > +#endif /* CONFIG_ARCH_VEXPRESS_DT */ +> +> All the ifdefs are really ugly. Most people are creating new board_dt.c +> file and copying over pieces they need. Once DT support is on par with +> the old file, the old file can be deleted. + +Would you expect the common code between the DT and non-DT boards to +dwindle away to nothing over time? I wasn't sure whether we would +get that far. + +Agreed regarding the ifdefs -- but I thought it would be better to do +this refactoring in a separate patch which _only_ does the refactoring, +once the functional changes are agreed. + +That way the actual functional changes will be clear in the history. +If I try to refactor it ahead of time, I will probably miss some +bits of factoring which turn out to be necessary later, resulting +in extra churn. + + +If this round of review produces something which feels likely to be +close to the final form, I could propose a refactoring patch to go +on top of it, but I'm wary of doing this prematurely. + +Cheers +---Dave +_______________________________________________ +devicetree-discuss mailing list +devicetree-discuss@lists.ozlabs.org +https://lists.ozlabs.org/listinfo/devicetree-discuss diff --git a/a/content_digest b/N1/content_digest index f472e7b..7df3948 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,9 +1,15 @@ "ref\01316596786-2539-1-git-send-email-dave.martin@linaro.org\0" "ref\04E79E588.6010703@gmail.com\0" - "From\0dave.martin@linaro.org (Dave Martin)\0" - "Subject\0[PATCH] ARM: vexpress: initial device tree support\0" + "ref\04E79E588.6010703-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org\0" + "From\0Dave Martin <dave.martin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\0" + "Subject\0Re: [PATCH] ARM: vexpress: initial device tree support\0" "Date\0Wed, 21 Sep 2011 15:24:25 +0100\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Rob Herring <robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" + "Cc\0devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org" + Rob Herring <rob.herring-CfjtxxwdHycX+EX/Zwu52A@public.gmane.org> + linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org + " Pawe\305\202 Moll <Pawel.Moll-5wv7dgnIgG8@public.gmane.org>" + " patches-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org\0" "\00:1\0" "b\0" "On Wed, Sep 21, 2011 at 08:24:24AM -0500, Rob Herring wrote:\n" @@ -21,11 +27,11 @@ "> > For now, clocks and timers are not handled via the device tree.\n" "> > Implementation of these can follow in later patches.\n" "> > \n" - "> > Thanks to Lorenzo Pieralisi, Grant Likely and Pawe? Moll for their\n" + "> > Thanks to Lorenzo Pieralisi, Grant Likely and Pawe\305\202 Moll for their\n" "> > help and contributions.\n" "> > \n" "> > Signed-off-by: Dave Martin <dave.martin@linaro.org>\n" - "> > Acked-by: Pawe? Moll <Pawel.Moll@arm.com>\n" + "> > Acked-by: Pawe\305\202 Moll <Pawel.Moll@arm.com>\n" "> > ---\n" "> > \n" "> > There are some outstanding issues which need to be discussed, listed\n" @@ -139,7 +145,7 @@ "> > multiple core-tiles int the same kernel. It well need to get fixed\n" "> > later, when extra core tile support is merged (or before).\n" "> > \n" - "> > Pawe? Moll is looking into this separately.\n" + "> > Pawe\305\202 Moll is looking into this separately.\n" "> > \n" "> > * The Kconfig logic for ensuring that at least one boot protocol and\n" "> > at least one core tile are selected is a bit ugly. Suggestions for\n" @@ -196,20 +202,20 @@ "> > +\t\t#size-cells = <1>;\n" "> > +\t\t#interrupt-cells = <1>;\n" "> > +\n" - "> > +\t\tflash at 0,00000000 {\n" + "> > +\t\tflash@0,00000000 {\n" "> > +\t\t\tcompatible = \"arm,vexpress-flash\", \"cfi-flash\";\n" "> > +\t\t\treg = <0 0x00000000 0x04000000\n" "> > +\t\t\t 1 0x00000000 0x04000000>;\n" "> > +\t\t\tbank-width = <4>;\n" "> > +\t\t};\n" "> > +\n" - "> > +\t\tpsram at 2,00000000 {\n" + "> > +\t\tpsram@2,00000000 {\n" "> > +\t\t\tcompatible = \"mtd-ram\";\n" "> > +\t\t\treg = <2 0x00000000 0x02000000>;\n" "> > +\t\t\tbank-width = <4>;\n" "> > +\t\t};\n" "> > +\n" - "> > +\t\tethernet at 3,02000000 {\n" + "> > +\t\tethernet@3,02000000 {\n" "> > +\t\t\tcompatible = \"smsc,lan9118\", \"smsc,lan9115\";\n" "> > +\t\t\treg = <3 0x02000000 0x10000>;\n" "> > +\t\t\treg-io-width = <4>;\n" @@ -218,89 +224,89 @@ "> > +\t\t\tsmsc,irq-push-pull;\n" "> > +\t\t};\n" "> > +\n" - "> > +\t\tusb at 3,03000000 {\n" + "> > +\t\tusb@3,03000000 {\n" "> > +\t\t\tcompatible = \"nxp,usb-isp1761\";\n" "> > +\t\t\treg = <3 0x03000000 0x20000>;\n" "> > +\t\t\tinterrupts = <16>;\n" "> > +\t\t\tport1-otg;\n" "> > +\t\t};\n" "> > +\n" - "> > +\t\tperipherals at 7,00000000 {\n" + "> > +\t\tperipherals@7,00000000 {\n" "> > +\t\t\tcompatible = \"arm,amba-bus\", \"simple-bus\";\n" "> > +\t\t\t#address-cells = <1>;\n" "> > +\t\t\t#size-cells = <1>;\n" "> > +\t\t\tranges = <0 7 0 0x20000>;\n" "> > +\n" "> > +\t\t\t// PCI-E I2C bus\n" - "> > +\t\t\ti2c0: i2c at 02000 {\n" + "> > +\t\t\ti2c0: i2c@02000 {\n" "> > +\t\t\t\tcompatible = \"arm,versatile-i2c\";\n" "> > +\t\t\t\treg = <0x02000 0x1000>;\n" "> > +\n" "> > +\t\t\t\t#address-cells = <1>;\n" "> > +\t\t\t\t#size-cells = <0>;\n" "> > +\n" - "> > +\t\t\t\tpcie-switch at 60 {\n" + "> > +\t\t\t\tpcie-switch@60 {\n" "> > +\t\t\t\t\tcompatible = \"idt,89hpes32h8\";\n" "> > +\t\t\t\t\treg = <0x60>;\n" "> > +\t\t\t\t};\n" "> > +\t\t\t};\n" "> > +\n" - "> > +\t\t\taaci at 04000 {\n" + "> > +\t\t\taaci@04000 {\n" "> > +\t\t\t\tcompatible = \"arm,pl041\", \"arm,primecell\";\n" "> > +\t\t\t\treg = <0x04000 0x1000>;\n" "> > +\t\t\t\tinterrupts = <11>;\n" "> > +\t\t\t};\n" "> > +\n" - "> > +\t\t\tmmci at 05000 {\n" + "> > +\t\t\tmmci@05000 {\n" "> > +\t\t\t\tcompatible = \"arm,pl180\", \"arm,primecell\";\n" "> > +\t\t\t\treg = <0x05000 0x1000>;\n" "> > +\t\t\t\tinterrupts = <9 10>;\n" "> > +\t\t\t};\n" "> > +\n" - "> > +\t\t\tkmi at 06000 {\n" + "> > +\t\t\tkmi@06000 {\n" "> > +\t\t\t\tcompatible = \"arm,pl050\", \"arm,primecell\";\n" "> > +\t\t\t\treg = <0x06000 0x1000>;\n" "> > +\t\t\t\tinterrupts = <12>;\n" "> > +\t\t\t};\n" "> > +\n" - "> > +\t\t\tkmi at 07000 {\n" + "> > +\t\t\tkmi@07000 {\n" "> > +\t\t\t\tcompatible = \"arm,pl050\", \"arm,primecell\";\n" "> > +\t\t\t\treg = <0x07000 0x1000>;\n" "> > +\t\t\t\tinterrupts = <13>;\n" "> > +\t\t\t};\n" "> > +\n" - "> > +\t\t\tuart0: uart at 09000 {\n" + "> > +\t\t\tuart0: uart@09000 {\n" "> > +\t\t\t\tcompatible = \"arm,pl011\", \"arm,primecell\";\n" "> > +\t\t\t\treg = <0x09000 0x1000>;\n" "> > +\t\t\t\tinterrupts = <5>;\n" "> > +\t\t\t};\n" "> > +\n" - "> > +\t\t\tuart1: uart at 0a000 {\n" + "> > +\t\t\tuart1: uart@0a000 {\n" "> > +\t\t\t\tcompatible = \"arm,pl011\", \"arm,primecell\";\n" "> > +\t\t\t\treg = <0x0a000 0x1000>;\n" "> > +\t\t\t\tinterrupts = <6>;\n" "> > +\t\t\t};\n" "> > +\n" - "> > +\t\t\tuart2: uart at 0b000 {\n" + "> > +\t\t\tuart2: uart@0b000 {\n" "> > +\t\t\t\tcompatible = \"arm,pl011\", \"arm,primecell\";\n" "> > +\t\t\t\treg = <0x0b000 0x1000>;\n" "> > +\t\t\t\tinterrupts = <7>;\n" "> > +\t\t\t};\n" "> > +\n" - "> > +\t\t\tuart3: uart at 0c000 {\n" + "> > +\t\t\tuart3: uart@0c000 {\n" "> > +\t\t\t\tcompatible = \"arm,pl011\", \"arm,primecell\";\n" "> > +\t\t\t\treg = <0x0c000 0x1000>;\n" "> > +\t\t\t\tinterrupts = <8>;\n" "> > +\t\t\t};\n" "> > +\n" - "> > +\t\t\twdt at 0f000 {\n" + "> > +\t\t\twdt@0f000 {\n" "> > +\t\t\t\tcompatible = \"arm,sp805\", \"arm,primecell\";\n" "> > +\t\t\t\treg = <0x0f000 0x1000>;\n" "> > +\t\t\t\tinterrupts = <0>;\n" "> > +\t\t\t};\n" "> > +\n" "> > +\t\t\t// Timer init is hardcoded in v2m_timer_init(), for now.\n" - "> > +\t\t\t// timer at 11000 {\n" + "> > +\t\t\t// timer@11000 {\n" "> > +\t\t\t//\tcompatible = \"arm,arm-sp804\";\n" "> \n" "> arm,sp804 is more consistent. I believe the sp804 does have the periphid\n" @@ -317,11 +323,402 @@ "> > +\t\t\t//\tinterrupts = <2>;\n" "> > +\t\t\t// };\n" "> > +\n" - "> > +\t\t\t// timer at 12000 {\n" + "> > +\t\t\t// timer@12000 {\n" "> > +\t\t\t//\tcompatible = \"arm,arm-sp804\";\n" "> > +\t\t\t//\treg = <0x12000 0x1000>;\n" "> > +\t\t\t// };\n" "> \n" - > Just because Linux is not using it, doesn't mean you should comment it out. + "> Just because Linux is not using it, doesn't mean you should comment it out.\n" + "\n" + "From the point of view of describing the hardware, yes. However, I was\n" + "a bit worried that if sp804 is turned into a full driver, it will get\n" + "initialised twice -- once explicitly and once in of_platform_populate()...\n" + "at least until the baord code is adapted to work properly with the new\n" + "driver.\n" + "\n" + "Commenting these entries out for now seemed a good idea to avoid the flag-day\n" + "hazard. Am I being too cautious?\n" + "\n" + "> \n" + "> > +\n" + "> > +\t\t\t// DVI I2C bus (DDC)\n" + "> > +\t\t\ti2c1: i2c@16000 {\n" + "> > +\t\t\t\tcompatible = \"arm,versatile-i2c\";\n" + "> > +\t\t\t\treg = <0x16000 0x1000>;\n" + "> > +\n" + "> > +\t\t\t\t#address-cells = <1>;\n" + "> > +\t\t\t\t#size-cells = <0>;\n" + "> > +\n" + "> > +\t\t\t\tedid@50 {\n" + "> > +\t\t\t\t\tcompatible = \"edid\";\n" + "> > +\t\t\t\t\treg = <0x50>;\n" + "> > +\t\t\t\t};\n" + "> > +\t\t\t};\n" + "> > +\n" + "> > +\t\t\trtc@17000 {\n" + "> > +\t\t\t\tcompatible = \"arm,pl031\", \"arm,primecell\";\n" + "> > +\t\t\t\treg = <0x017000 0x1000>;\n" + "> > +\t\t\t\tinterrupts = <4>;\n" + "> > +\t\t\t};\n" + "> > +\n" + "> > +\t\t\tcompact-flash@1a000 {\n" + "> > +\t\t\t\tcompatible = \"ata-generic\";\n" + "> > +\t\t\t\treg = <0x1a000 0x100\n" + "> > +\t\t\t\t 0x1a100 0xf00>;\n" + "> > +\t\t\t\treg-shift = <2>;\n" + "> > +\t\t\t};\n" + "> > +\t\t};\n" + "> > +\t};\n" + "> > +};\n" + "> > diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts\n" + "> > new file mode 100644\n" + "> > index 0000000..059be97\n" + "> > --- /dev/null\n" + "> > +++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts\n" + "> > @@ -0,0 +1,80 @@\n" + "> > +// ARM Ltd. Versatile Express Corex-A9 (Quad Core) Core Tile V2P-CA9 (HBI-0191B)\n" + "> > +\n" + "> > +/dts-v1/;\n" + "> > +\n" + "> > +/include/ \"skeleton.dtsi\"\n" + "> > +\n" + "> > +/ {\n" + "> > +\tmodel = \"ARM Versatile Express (Cortex-A9 Quad Core Tile)\";\n" + "> > +\tcompatible = \"arm,vexpress-v2p-ca9\", \"arm,vexpress\";\n" + "> > +\tinterrupt-parent = <&intc>;\n" + "> > +\n" + "> > +\tmemory {\n" + "> > +\t\tdevice_type = \"memory\";\n" + "> > +\t\treg = <0x60000000 0x40000000>;\n" + "> > +\t};\n" + "> > +\n" + "> > +\tintc: interrupt-controller@1e001000 {\n" + "> > +\t\tcompatible = \"arm,cortex-a9-gic\";\n" + "> > +\t\t#interrupt-cells = <2>;\n" + "> > +\t\t#address-cells = <0>;\n" + "> > +\t\tinterrupt-controller;\n" + "> > +\t\treg = <0x1e001000 0x1000>,\n" + "> > +\t\t <0x1e000100 0x100>;\n" + "> > +\t};\n" + "> \n" + "> Is this really all by itself? It should be in the sub-tree of the\n" + "> appropriate bus.\n" + "\n" + "Hmmm, yes. I guess I got away with this due to not using the proper GIC\n" + "bindings yet (and not declaring the other core-tile peripherals).\n" + "\n" + "> You need an \"interrupt-parent;\" line so the parent is not itself.\n" + "\n" + "Do you mean for the bus?\n" + "\n" + "> \n" + "> > +\n" + "> > +\tmotherboard {\n" + "> > +\t\tranges = <0 0 0x40000000 0x04000000\n" + "> > +\t\t\t 1 0 0x44000000 0x04000000\n" + "> > +\t\t\t 2 0 0x48000000 0x04000000\n" + "> > +\t\t\t 3 0 0x4c000000 0x04000000\n" + "> > +\t\t\t 7 0 0x10000000 0x00020000>;\n" + "> > +\n" + "> > +\t\tinterrupt-map-mask = <0 0 63>;\n" + "> > +\t\tinterrupt-map = <0 0 0 &intc 32 8\n" + "\n" + "^ This should be ... 4 btw (thanks to Pawel for spotting that)\n" + "\n" + "> > +\t\t\t\t 0 0 1 &intc 33 4\n" + "> > +\t\t\t\t 0 0 2 &intc 34 4\n" + "> > +\t\t\t\t 0 0 3 &intc 35 4\n" + "> > +\t\t\t\t 0 0 4 &intc 36 4\n" + "> > +\t\t\t\t 0 0 5 &intc 37 4\n" + "> > +\t\t\t\t 0 0 6 &intc 38 4\n" + "> > +\t\t\t\t 0 0 7 &intc 39 4\n" + "> > +\t\t\t\t 0 0 8 &intc 40 4\n" + "> > +\t\t\t\t 0 0 9 &intc 41 4\n" + "> > +\t\t\t\t 0 0 10 &intc 42 4\n" + "> > +\t\t\t\t 0 0 11 &intc 43 4\n" + "> > +\t\t\t\t 0 0 12 &intc 44 4\n" + "> > +\t\t\t\t 0 0 13 &intc 45 4\n" + "> > +\t\t\t\t 0 0 14 &intc 46 4\n" + "> > +\t\t\t\t 0 0 15 &intc 47 4\n" + "> > +\t\t\t\t 0 0 16 &intc 48 4\n" + "> > +\t\t\t\t 0 0 17 &intc 49 4\n" + "> > +\t\t\t\t 0 0 18 &intc 50 4\n" + "> > +\t\t\t\t 0 0 19 &intc 51 4\n" + "> > +\t\t\t\t 0 0 20 &intc 52 4\n" + "> > +\t\t\t\t 0 0 21 &intc 53 4\n" + "> > +\t\t\t\t 0 0 22 &intc 54 4\n" + "> > +\t\t\t\t 0 0 23 &intc 55 4\n" + "> > +\t\t\t\t 0 0 24 &intc 56 4\n" + "> > +\t\t\t\t 0 0 25 &intc 57 4\n" + "> > +\t\t\t\t 0 0 26 &intc 58 4\n" + "> > +\t\t\t\t 0 0 27 &intc 59 4\n" + "> > +\t\t\t\t 0 0 28 &intc 60 4\n" + "> > +\t\t\t\t 0 0 29 &intc 61 4\n" + "> > +\t\t\t\t 0 0 30 &intc 62 4\n" + "> > +\t\t\t\t 0 0 31 &intc 63 4\n" + "> > +\t\t\t\t 0 0 32 &intc 64 4\n" + "> > +\t\t\t\t 0 0 33 &intc 65 4\n" + "> > +\t\t\t\t 0 0 34 &intc 66 4\n" + "> > +\t\t\t\t 0 0 35 &intc 67 4\n" + "> > +\t\t\t\t 0 0 36 &intc 68 4\n" + "> > +\t\t\t\t 0 0 37 &intc 69 4\n" + "> > +\t\t\t\t 0 0 38 &intc 70 4\n" + "> > +\t\t\t\t 0 0 39 &intc 71 4\n" + "> > +\t\t\t\t 0 0 40 &intc 72 4\n" + "> > +\t\t\t\t 0 0 41 &intc 73 4\n" + "> > +\t\t\t\t 0 0 42 &intc 74 4>;\n" + "> > +\t};\n" + "> > +};\n" + "> > +\n" + "> > +/include/ \"vexpress-v2m-legacy.dtsi\"\n" + "> > diff --git a/arch/arm/configs/vexpress_defconfig b/arch/arm/configs/vexpress_defconfig\n" + "> > index f2de51f..6c3c5f6 100644\n" + "> > --- a/arch/arm/configs/vexpress_defconfig\n" + "> > +++ b/arch/arm/configs/vexpress_defconfig\n" + "> > @@ -22,6 +22,7 @@ CONFIG_MODULE_UNLOAD=y\n" + "> > # CONFIG_IOSCHED_DEADLINE is not set\n" + "> > # CONFIG_IOSCHED_CFQ is not set\n" + "> > CONFIG_ARCH_VEXPRESS=y\n" + "> > +CONFIG_ARCH_VEXPRESS_ATAGS=y\n" + "> > CONFIG_ARCH_VEXPRESS_CA9X4=y\n" + "> > # CONFIG_SWP_EMULATE is not set\n" + "> > CONFIG_SMP=y\n" + "> > diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig\n" + "> > index 9311484..ea64630 100644\n" + "> > --- a/arch/arm/mach-vexpress/Kconfig\n" + "> > +++ b/arch/arm/mach-vexpress/Kconfig\n" + "> > @@ -1,12 +1,55 @@\n" + "> > menu \"Versatile Express platform type\"\n" + "> > \tdepends on ARCH_VEXPRESS\n" + "> > \n" + "> > +# ARCH_VEXPRESS ensures a sane minimal config is selected by selecting\n" + "> > +# ARCH_VEXPRESS_SANE_CONFIG.\n" + "> > +# Extend the logic here when adding new core tiles.\n" + "> > +\n" + "> > +config ARCH_VEXPRESS_SANE_CONFIG\n" + "> > +\tbool\n" + "> > +\tselect ARCH_VEXPRESS_CA9X4\n" + "> > +\tselect ARCH_VEXPRESS_ATAGS if !ARCH_VEXPRESS_DT\n" + "> > +\n" + "> > +\n" + "> > +comment \"At least one boot type must be selected\"\n" + "> > +\n" + "> > +config ARCH_VEXPRESS_ATAGS\n" + "> > +\tbool \"Boot via ATAGs\"\n" + "> > +\tdefault y\n" + "> > +\thelp\n" + "> > +\t This option enables support for the board using the standard\n" + "> > +\t ATAGs boot protocol.\n" + "> > +\n" + "> > +\t If your bootloader supports FDT-based booting and you do not\n" + "> > +\t intend ever to boot via the traditional ATAGs method, you can say\n" + "> > +\t N here.\n" + "> > +\n" + "> > +config ARCH_VEXPRESS_DT\n" + "> > +\tbool \"Boot via Device Tree\"\n" + "> > +\tselect USE_OF\n" + "> > +\thelp\n" + "> > +\t This option enables support for the board, and enables booting\n" + "> > +\t via a Flattened Device Tree provided by the bootloader.\n" + "> > +\n" + "> > +\t If your bootloader supports FDT-based booting, you can say Y\n" + "> > +\t here, otherwise, say N.\n" + "> > +\n" + "> > +\n" + "> > +# Core Tile support options\n" + "> > +\n" + "> > +comment \"At least one core tile must be selected\"\n" + "> > +\n" + "> > config ARCH_VEXPRESS_CA9X4\n" + "> > -\tbool \"Versatile Express Cortex-A9x4 tile\"\n" + "> > +\tbool \"Versatile Express Cortex-A9x4 Core Tile\"\n" + "> > +\tdefault y\n" + "> > \tselect CPU_V7\n" + "> > \tselect ARM_GIC\n" + "> > \tselect ARM_ERRATA_720789\n" + "> > \tselect ARM_ERRATA_751472\n" + "> > \tselect ARM_ERRATA_753970\n" + "> > +\thelp\n" + "> > +\t Include support for the Cortex-A9x4 Core Tile (HBI-0191B).\n" + "> > +\n" + "> > +\t If unsure, say Y.\n" + "> > \n" + "> > endmenu\n" + "> > diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c\n" + "> > index bfd32f5..e2fe2c9 100644\n" + "> > --- a/arch/arm/mach-vexpress/ct-ca9x4.c\n" + "> > +++ b/arch/arm/mach-vexpress/ct-ca9x4.c\n" + "> > @@ -9,6 +9,7 @@\n" + "> > #include <linux/amba/bus.h>\n" + "> > #include <linux/amba/clcd.h>\n" + "> > #include <linux/clkdev.h>\n" + "> > +#include <linux/irqdomain.h>\n" + "> > \n" + "> > #include <asm/hardware/arm_timer.h>\n" + "> > #include <asm/hardware/cache-l2x0.h>\n" + "> > @@ -59,10 +60,16 @@ static void __init ct_ca9x4_map_io(void)\n" + "> > \tiotable_init(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc));\n" + "> > }\n" + "> > \n" + "> > +static const struct of_device_id gic_of_match[] __initconst = {\n" + "> > +\t{ .compatible = \"arm,cortex-a9-gic\", },\n" + "> > +\t{}\n" + "> > +};\n" + "> > +\n" + "> > static void __init ct_ca9x4_init_irq(void)\n" + "> > {\n" + "> > \tgic_init(0, 29, MMIO_P2V(A9_MPCORE_GIC_DIST),\n" + "> > \t\t MMIO_P2V(A9_MPCORE_GIC_CPU));\n" + "> > +\tirq_domain_generate_simple(gic_of_match, A9_MPCORE_GIC_DIST, 0);\n" + "> > }\n" + "> > \n" + "> > #if 0\n" + "> > diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c\n" + "> > index 9e6b93b..6defce6 100644\n" + "> > --- a/arch/arm/mach-vexpress/v2m.c\n" + "> > +++ b/arch/arm/mach-vexpress/v2m.c\n" + "> > @@ -6,6 +6,8 @@\n" + "> > #include <linux/amba/mmci.h>\n" + "> > #include <linux/io.h>\n" + "> > #include <linux/init.h>\n" + "> > +#include <linux/of_irq.h>\n" + "> > +#include <linux/of_platform.h>\n" + "> > #include <linux/platform_device.h>\n" + "> > #include <linux/ata_platform.h>\n" + "> > #include <linux/smsc911x.h>\n" + "> > @@ -118,7 +120,7 @@ int v2m_cfg_read(u32 devfn, u32 *data)\n" + "> > \treturn !!(val & SYS_CFG_ERR);\n" + "> > }\n" + "> > \n" + "> > -\n" + "> > +#ifdef CONFIG_ARCH_VEXPRESS_ATAGS\n" + "> > static struct resource v2m_pcie_i2c_resource = {\n" + "> > \t.start\t= V2M_SERIAL_BUS_PCI,\n" + "> > \t.end\t= V2M_SERIAL_BUS_PCI + SZ_4K - 1,\n" + "> > @@ -200,6 +202,7 @@ static struct platform_device v2m_usb_device = {\n" + "> > \t.num_resources\t= ARRAY_SIZE(v2m_usb_resources),\n" + "> > \t.dev.platform_data = &v2m_usb_config,\n" + "> > };\n" + "> > +#endif /* CONFIG_ARCH_VEXPRESS_ATAGS */\n" + "> > \n" + "> > static void v2m_flash_set_vpp(struct platform_device *pdev, int on)\n" + "> > {\n" + "> > @@ -211,6 +214,7 @@ static struct physmap_flash_data v2m_flash_data = {\n" + "> > \t.set_vpp\t= v2m_flash_set_vpp,\n" + "> > };\n" + "> > \n" + "> > +#ifdef CONFIG_ARCH_VEXPRESS_ATAGS\n" + "> > static struct resource v2m_flash_resources[] = {\n" + "> > \t{\n" + "> > \t\t.start\t= V2M_NOR0,\n" + "> > @@ -254,6 +258,7 @@ static struct platform_device v2m_cf_device = {\n" + "> > \t.num_resources\t= ARRAY_SIZE(v2m_pata_resources),\n" + "> > \t.dev.platform_data = &v2m_pata_data,\n" + "> > };\n" + "> > +#endif /* CONFIG_ARCH_VEXPRESS_ATAGS */\n" + "> > \n" + "> > static unsigned int v2m_mmci_status(struct device *dev)\n" + "> > {\n" + "> > @@ -265,6 +270,7 @@ static struct mmci_platform_data v2m_mmci_data = {\n" + "> > \t.status\t\t= v2m_mmci_status,\n" + "> > };\n" + "> > \n" + "> > +#ifdef CONFIG_ARCH_VEXPRESS_ATAGS\n" + "> > static AMBA_DEVICE(aaci, \"mb:aaci\", V2M_AACI, NULL);\n" + "> > static AMBA_DEVICE(mmci, \"mb:mmci\", V2M_MMCI, &v2m_mmci_data);\n" + "> > static AMBA_DEVICE(kmi0, \"mb:kmi0\", V2M_KMI0, NULL);\n" + "> > @@ -288,6 +294,7 @@ static struct amba_device *v2m_amba_devs[] __initdata = {\n" + "> > \t&wdt_device,\n" + "> > \t&rtc_device,\n" + "> > };\n" + "> > +#endif /* CONFIG_ARCH_VEXPRESS_ATAGS */\n" + "> > \n" + "> > \n" + "> > static long v2m_osc_round(struct clk *clk, unsigned long rate)\n" + "> > @@ -415,6 +422,8 @@ static void __init v2m_init_irq(void)\n" + "> > \tct_desc->init_irq();\n" + "> > }\n" + "> > \n" + "> > +\n" + "> > +#ifdef CONFIG_ARCH_VEXPRESS_ATAGS\n" + "> > static void __init v2m_init(void)\n" + "> > {\n" + "> > \tint i;\n" + "> > @@ -443,3 +452,46 @@ MACHINE_START(VEXPRESS, \"ARM-Versatile Express\")\n" + "> > \t.timer\t\t= &v2m_timer,\n" + "> > \t.init_machine\t= v2m_init,\n" + "> > MACHINE_END\n" + "> > +#endif /* CONFIG_ARCH_VEXPRESS_ATAGS */\n" + "> > +\n" + "> > +#ifdef CONFIG_ARCH_VEXPRESS_DT\n" + "> > +struct of_dev_auxdata v2m_dt_auxdata_lookup[] __initdata = {\n" + "> > +\tOF_DEV_AUXDATA(\"arm,vexpress-flash\", V2M_NOR0, \"physmap-flash\", &v2m_flash_data),\n" + "> > +\tOF_DEV_AUXDATA(\"arm,primecell\", V2M_AACI, \"mb:aaci\", NULL),\n" + "> > +\tOF_DEV_AUXDATA(\"arm,primecell\", V2M_WDT, \"mb:wdt\", NULL),\n" + "> > +\tOF_DEV_AUXDATA(\"arm,primecell\", V2M_MMCI, \"mb:mmci\", &v2m_mmci_data),\n" + "> > +\tOF_DEV_AUXDATA(\"arm,primecell\", V2M_KMI0, \"mb:kmi0\", NULL),\n" + "> > +\tOF_DEV_AUXDATA(\"arm,primecell\", V2M_KMI1, \"mb:kmi1\", NULL),\n" + "> > +\tOF_DEV_AUXDATA(\"arm,primecell\", V2M_UART0, \"mb:uart0\", NULL),\n" + "> > +\tOF_DEV_AUXDATA(\"arm,primecell\", V2M_UART1, \"mb:uart1\", NULL),\n" + "> > +\tOF_DEV_AUXDATA(\"arm,primecell\", V2M_UART2, \"mb:uart2\", NULL),\n" + "> > +\tOF_DEV_AUXDATA(\"arm,primecell\", V2M_UART3, \"mb:uart3\", NULL),\n" + "> > +\tOF_DEV_AUXDATA(\"arm,primecell\", V2M_RTC, \"mb:rtc\", NULL),\n" + "> > +\t{}\n" + "> > +};\n" + "> > +\n" + "> > +static void __init v2m_dt_init(void)\n" + "> > +{\n" + "> > +\tof_platform_populate(NULL, of_default_bus_match_table,\n" + "> > +\t\t\t v2m_dt_auxdata_lookup, NULL);\n" + "> > +\n" + "> > +\tpm_power_off = v2m_power_off;\n" + "> > +\tarm_pm_restart = v2m_restart;\n" + "> > +\n" + "> > +\tct_desc->init_tile();\n" + "> > +}\n" + "> > +\n" + "> > +static const char *v2m_dt_match[] __initconst = {\n" + "> > +\t\"arm,vexpress\",\n" + "> > +\tNULL,\n" + "> > +};\n" + "> > +\n" + "> > +DT_MACHINE_START(VEXPRESS_DT, \"ARM Versatile Express\")\n" + "> > +\t.map_io\t\t= v2m_map_io,\n" + "> > +\t.init_early\t= v2m_init_early,\n" + "> > +\t.init_irq\t= v2m_init_irq,\n" + "> > +\t.timer\t\t= &v2m_timer,\n" + "> > +\t.init_machine\t= v2m_dt_init,\n" + "> > +\t.dt_compat\t= v2m_dt_match,\n" + "> > +MACHINE_END\n" + "> > +#endif /* CONFIG_ARCH_VEXPRESS_DT */\n" + "> \n" + "> All the ifdefs are really ugly. Most people are creating new board_dt.c\n" + "> file and copying over pieces they need. Once DT support is on par with\n" + "> the old file, the old file can be deleted.\n" + "\n" + "Would you expect the common code between the DT and non-DT boards to\n" + "dwindle away to nothing over time? I wasn't sure whether we would\n" + "get that far.\n" + "\n" + "Agreed regarding the ifdefs -- but I thought it would be better to do\n" + "this refactoring in a separate patch which _only_ does the refactoring,\n" + "once the functional changes are agreed.\n" + "\n" + "That way the actual functional changes will be clear in the history.\n" + "If I try to refactor it ahead of time, I will probably miss some\n" + "bits of factoring which turn out to be necessary later, resulting\n" + "in extra churn.\n" + "\n" + "\n" + "If this round of review produces something which feels likely to be\n" + "close to the final form, I could propose a refactoring patch to go\n" + "on top of it, but I'm wary of doing this prematurely.\n" + "\n" + "Cheers\n" + "---Dave\n" + "_______________________________________________\n" + "devicetree-discuss mailing list\n" + "devicetree-discuss@lists.ozlabs.org\n" + https://lists.ozlabs.org/listinfo/devicetree-discuss -2e87c732a9b15f82999fb2f52892b6753203b7de742ea4973ce41690640d806f +47160d668d2fb9a7989ab206c331703dfb3ebecb4583a7c4200b01e409d09c9e
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