From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH] drm/i915: Use PIPE_CONTROL for flushing on
 gen6+.
Date: Mon, 26 Sep 2011 21:23:02 +0200
Message-ID: <20110926192302.GC2804@phenom.ffwll.local>
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To: Chris Wilson <chris@chris-wilson.co.uk>
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On Mon, Sep 26, 2011 at 08:16:04PM +0100, Chris Wilson wrote:
> On Mon, 26 Sep 2011 11:59:23 -0700, Kenneth Graunke <kenneth@whitecape.org> wrote:
> > From: Jesse Barnes <jbarnes@virtuousgeek.org>
> 
> From the school of "If ain't broke, don't fix it" there needs to be a real
> explanation of why this change is required here.
> 
> PIPE_CONTROL and its workarounds is a very bitter pill to swallow if
> MI_FLUSH continues to function.

Lazy tlb flush, gfdt flush, seperate depth cache flush. In short, I want
this ;-)
-Daniel
-- 
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48