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Date: Fri, 21 Oct 2011 15:26:17 +0800
From: =?utf-8?B?6Zmz6Z+L5Lu7?= <chenwj@iis.sinica.edu.tw>
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Subject: Re: [Qemu-devel] Multi heterogenous CPU archs for SoC sim?
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To: Peter Maydell <peter.maydell@linaro.org>
Cc: Blue Swirl <blauwirbel@gmail.com>, Andreas =?utf-8?Q?F=C3=A4rber?= <andreas.faerber@web.de>, =?utf-8?B?TGx1w61z?= <xscript@gmx.net>, Greg McGary <greg.mcgary@gmail.com>, qemu-devel Developers <qemu-devel@nongnu.org>

> We may want the tb cache to be per-core anyway (and one thread per core=
),
> which would avoid the problem of trying to wedge everything into one se=
t
> of tb_flags.
>=20
> (Has anybody had a look at http://sourceforge.net/p/coremu/home/Home/ ?=
)

  COREMU treats QEMU as an entity and lauches multiple QEMUs at the same
time. QEMUs communicates to each other by using a underlying thin layer
provided by COREMU. I think this approach is much clean than trying to
parallelize QEMU itself.

Regards,
chenwj

--=20
Wei-Ren Chen (=E9=99=B3=E9=9F=8B=E4=BB=BB)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667