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From: Wu Fengguang <fengguang.wu@intel.com>
To: Sander Jansen <s.jansen@gmail.com>
Cc: Christopher White <c.white@pulseforce.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"Bossart, Pierre-louis" <pierre-louis.bossart@intel.com>,
	"Wang, Zhenyu Z" <zhenyu.z.wang@intel.com>,
	Jeremy Bush <contractfrombelow@gmail.com>
Subject: Re: [PATCH v5] drm/i915: pass ELD to HDMI/DP audio driver
Date: Wed, 2 Nov 2011 16:52:46 +0800	[thread overview]
Message-ID: <20111102085246.GA28593@localhost> (raw)
In-Reply-To: <CACj81kHcQGWq_O23PqXhSFi9+jkHwrxghtpDDW_E=MMP4EH8NQ@mail.gmail.com>

Hi Sander,

> On Tue, Nov 1, 2011 at 8:45 PM, Wu Fengguang <fengguang.wu@intel.com> wrote:
> > Hi Christopher,
> >
> >> The log does confirm that the drm_edid_to_eld function is running, and
> >> that we're not far from a solution:
> >> [   21.061417] [drm:drm_edid_to_eld], ELD monitor TX-SR607
> >> [   21.061421] [drm:drm_edid_to_eld], ELD size 13, SAD count 8
> >
> > It looks all sane to this point.
> >
> >> As for where I am getting the EDID dump from, I am getting it from
> >> /sys/devices/pci0000:00/0000:00:02.0/drm/card0/card0-HDMI-A-2/edid,
> >> which provides direct virtual access to the EDID response of the
> >> connected device.
> >>
> >> I'm completely confident that the device doesn't report too small of a
> >> buffer size, and that it's completely compliant with the spec: If you
> >
> > Agreed.
> >
> >> have a Windows virtual machine (or if you're masochistic enough - a real
> >> machine) you should download the excellent, free "Monitor Asset Manager"
> >> by EnTech Taiwan from http://www.entechtaiwan.com/util/moninfo.shtm. It
> >> will let you analyze EDID + ELD + extended timings, etc from an EDID
> >> dump, such as the one taken above. It understands every part of EDID.
> >>
> >> I've put together a small archive containing my exact EDID binary dump
> >> (taken from the above device path), the FULL dmesg log, as well as
> >> EnTech's interpretation of the EDID dump, showing the full list of
> >> supported channels, formats, etc.
> >>
> >> I'm guessing there is some tiny bug in your interpretation of how to
> >> read ELD, maybe an incorrect 1 byte offset or something like that.
> >>
> >> Here's the pack:
> >> http://www.pulseforce.com/node/edid_to_eld.zip
> >
> > Thanks! It's great tool and information!
> >
> >> If you do a hex analysis of my EDID dump and compare it to what the
> >> edid_to_eld function is trying to do, it will probably show what's
> >> wrong. I'd love to have a look at that myself but am really busy with a
> >> project over here so I can't help out other than to recompile and test
> >> as fast as I can.
> >
> > Would you install the "intel-gpu-tools" package and run its
> > intel_audio_dump utility? If not shipped with your distribution, the
> > source code is also available in
> >
> > git://anongit.freedesktop.org/git/xorg/app/intel-gpu-tools
> >
> > You'll need to install packages "autotools-dev pkg-config
> > libpciaccess-dev libdrm-dev libdrm-intel1" in order to build it from
> > source.
> >
> > intel_audio_dump will dump the ELD data in the hardware buffer for use
> > by the audio driver. By verifying if that data is correct, we are able
> > to analyze whether and how the audio driver goes wrong.
> >
> 
> I think I experience similar issues. In my case the multi-channel pcm
> playback through HDMI doesn't work. Stereo and passthrough seem to
> work fine though !? It's hookedup  to my TV via a yamaha receiver.

Yeah, multi-channel playback should not work due to the audio driver
not knowing the HDMI sink is multi-channel capable.

Stereo and passthrough should work always.

> I'm currently running Linux 3.1 with a G45 chipset.
>
> libdrm 2.4.27-1
> xf86-video-intel 2.16.0-1
> 
> The eld seems be incorrectly parsed, though the kernel log didn't give
> much info. The eld info from alsa is rather empty:
 
In fact Linux 3.1 does not have the ELD patch yet. It should go into
the upcoming 3.2.

> cat /proc/asound/Intel/eld#3.0
> monitor_present		1
> eld_valid		0
> 
> Using the same Monitor Asset Manager I was able to verify that the edid from
> (/sys/devices/pci0000\:00/0000\:00\:02.0/drm/card0/card0-HDMI-A-1/edid
> ) does seem to contain the correct information.

That's good.

> I've attached both the edid and the output of Monitor Asset Manager.In
> addition I also run the intel_audio_dump.
> 
> Let me know if you need anymore information.
> 

As the ELD patch is not there, intel_audio_dump correctly reports

        AUD_CNTL_ST ELD valid			0

I'm not sure if it's convenient for you to compile new kernels (with
the ELD patch applied).  If not, we can wait Christopher White for the
feedback.

Thanks,
Fengguang

> Monitor
>   Model name............... SAMSUNG
>   Manufacturer............. Samsung
>   Plug and Play ID......... SAM050D
>   Serial number............ 1
>   Manufacture date......... 2008, ISO week 48
>   Filter driver............ None
>   -------------------------
>   EDID revision............ 1.3
>   Input signal type........ Digital
>   Color bit depth.......... Undefined
>   Display type............. RGB color
>   Screen size.............. 160 x 90 mm (7.2 in)
>   Power management......... Not supported
>   Extension blocs.......... 1 (CEA-EXT)
>   -------------------------
>   DDC/CI................... n/a
> 
> Color characteristics
>   Default color space...... Non-sRGB
>   Display gamma............ 2.20
>   Red chromaticity......... Rx 0.640 - Ry 0.330
>   Green chromaticity....... Gx 0.300 - Gy 0.600
>   Blue chromaticity........ Bx 0.150 - By 0.060
>   White point (default).... Wx 0.313 - Wy 0.329
>   Additional descriptors... None
> 
> Timing characteristics
>   Horizontal scan range.... 26-81kHz
>   Vertical scan range...... 24-75Hz
>   Video bandwidth.......... 150MHz
>   CVT standard............. Not supported
>   GTF standard............. Not supported
>   Additional descriptors... None
>   Preferred timing......... Yes
>   Native/preferred timing.. 1920x1080p at 60Hz (16:9)
>     Modeline............... "1920x1080" 148.500 1920 2008 2052 2200 1080 1084 1089 1125 +hsync +vsync
>   Detailed timing #1....... 1280x720p at 60Hz (16:9)
>     Modeline............... "1280x720" 74.250 1280 1390 1430 1650 720 725 730 750 +hsync +vsync
> 
> Standard timings supported
>      720 x  400p at  70Hz - IBM VGA
>      640 x  480p at  60Hz - IBM VGA
>      640 x  480p at  67Hz - Apple Mac II
>      640 x  480p at  72Hz - VESA
>      640 x  480p at  75Hz - VESA
>      800 x  600p at  60Hz - VESA
>      800 x  600p at  72Hz - VESA
>      800 x  600p at  75Hz - VESA
>      832 x  624p at  75Hz - Apple Mac II
>     1024 x  768p at  60Hz - VESA
>     1024 x  768p at  70Hz - VESA
>     1024 x  768p at  75Hz - VESA
>     1280 x 1024p at  75Hz - VESA
>     1152 x  870p at  75Hz - Apple Mac II
>     1152 x  864p at  75Hz - VESA STD
>     1280 x  800p at  60Hz - VESA STD
>     1280 x  960p at  60Hz - VESA STD
>     1280 x 1024p at  60Hz - VESA STD
>     1440 x  900p at  60Hz - VESA STD
>     1440 x  900p at  75Hz - VESA STD
>     1680 x 1050p at  60Hz - VESA STD
> 
> EIA/CEA-861 Information
>   Revision number.......... 3
>   IT underscan............. Supported
>   Basic audio.............. Supported
>   YCbCr 4:4:4.............. Supported
>   YCbCr 4:2:2.............. Supported
>   Native formats........... 4
>   Detailed timing #1....... 1920x1080i at 60Hz (16:9)
>     Modeline............... "1920x1080" 74.250 1920 2008 2052 2200 1080 1084 1094 1124 interlace +hsync +vsync
>   Detailed timing #2....... 720x480p at 60Hz (16:9)
>     Modeline............... "720x480" 27.000 720 736 798 858 480 489 495 525 -hsync -vsync
> 
> CE video identifiers (VICs) - timing/formats supported
>     1920 x 1080p at  60Hz - HDTV (16:9, 1:1) [Native]
>     1280 x  720p at  60Hz - HDTV (16:9, 1:1)
>     1920 x 1080i at  60Hz - HDTV (16:9, 1:1)
>      720 x  480p at  60Hz - EDTV (16:9, 32:27)
>     1920 x 1080p at  24Hz - HDTV (16:9, 1:1)
>     1920 x 1080p at  30Hz - HDTV (16:9, 1:1)
>     1440 x  480p at  60Hz - DVD (16:9, 16:27)
>     2880 x  480p at  60Hz - Console (16:9, 8:27)
>     NB: NTSC refresh rate = (Hz*1000)/1001
> 
> CE audio data (formats supported)
>   LPCM    2-channel, 16/20/24 bit depths at 32/44/48/88/96/176/192 kHz
>   LPCM    8-channel, 16/20/24 bit depths at 32/44/48/88/96/176/192 kHz
>   AC-3    6-channel,  640k max. bit rate at 32/44/48 kHz
>   DTS     7-channel, 1536k max. bit rate at 32/44/48/88/96 kHz
>   SACD    6-channel                      at 44 kHz
>   DD+     8-channel                      at 44/48 kHz
>   DVD-A   8-channel                      at 48/96/192 kHz
>   DTS-HD  8-channel, 16-bit              at 48/96/192 kHz
> 
> CE speaker allocation data
>   Channel configuration.... 7.1
>   Front left/right......... Yes
>   Front LFE................ Yes
>   Front center............. Yes
>   Rear left/right.......... Yes
>   Rear center.............. Yes
>   Front left/right center.. No
>   Rear left/right center... Yes
>   Rear LFE................. No
> 
> CE video capability data
>   CE scan behavior......... Supports overscan and underscan
>   IT scan behavior......... Supports overscan and underscan
>   PT scan behavior......... Not supported
>   RGB quantization range... Not supported
>   YCC quantization range... Not supported
> 
> CE colorimetry data
>   xvYCC709 support......... Yes
>   xvYCC601 support......... Yes
>   sYCC601 support.......... No
>   AdobeYCC601 support...... No
>   AdobeRGB support......... No
>   Metadata profile flags... 0x01
> 
> CE vendor specific data (VSDB)
>   IEEE registration number. 0x000C03
>   CEC physical address..... 1.1.0.0
>   Supports AI (ACP, ISRC).. Yes
>   Supports 48bpp........... No
>   Supports 36bpp........... Yes
>   Supports 30bpp........... Yes
>   Supports YCbCr 4:4:4..... Yes
>   Supports dual-link DVI... No
>   Maximum TMDS clock....... 225MHz
>   Audio/video latency (p).. n/a
>   Audio/video latency (i).. n/a
>   HDMI video capabilities.. No
>   Data payload............. 030C001100B82D00
> 
> Report information
>   Date generated........... 11/2/2011
>   Software revision........ 2.60.0.972
>   Data source.............. File
>   Operating system......... 5.1.2600.2.Service Pack 3 (Vista masked)
> 
> Raw data
>   00,FF,FF,FF,FF,FF,FF,00,4C,2D,0D,05,01,00,00,00,30,12,01,03,80,10,09,78,0A,EE,91,A3,54,4C,99,26,
>   0F,50,54,BD,EF,80,71,4F,81,00,81,40,81,80,95,00,95,0F,B3,00,01,01,02,3A,80,18,71,38,2D,40,58,2C,
>   45,00,A0,5A,00,00,00,1E,01,1D,00,72,51,D0,1E,20,6E,28,55,00,A0,5A,00,00,00,1E,00,00,00,FD,00,18,
>   4B,1A,51,0F,00,0A,20,20,20,20,20,20,00,00,00,FC,00,53,41,4D,53,55,4E,47,0A,20,20,20,20,20,01,A2,
>   02,03,3A,F4,48,90,04,05,03,20,22,0F,24,38,09,7F,07,0F,7F,07,15,07,50,3E,1F,C0,4D,02,00,57,06,00,
>   67,54,00,5F,54,01,83,5F,00,00,E2,00,0F,E3,05,03,01,68,03,0C,00,11,00,B8,2D,00,01,1D,80,18,71,1C,
>   16,20,58,2C,25,00,A0,5A,00,00,00,9E,8C,0A,D0,8A,20,E0,2D,10,10,3E,96,00,A0,5A,00,00,00,18,00,00,
>   00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,6B


> VIDEO_DIP_CTL         0xa13b0000  Video DIP Control
> SDVOB                 0x00000adc  Digital Display Port B Control Register
> SDVOC                 0x0000089c  Digital Display Port C Control Register
> PORT_HOTPLUG_EN       0x30000320  Hot Plug Detect Enable
> AUD_CONFIG            0x00000004  Audio Configuration
> AUD_DEBUG             0x00000000  Audio Debug
> AUD_VID_DID           0x80862803  Audio Vendor ID / Device ID
> AUD_RID               0x00100000  Audio Revision ID
> AUD_SUBN_CNT          0x00010001  Audio Subordinate Node Count
> AUD_FUNC_GRP          0x00000001  Audio Function Group Type
> AUD_SUBN_CNT2         0x00020002  Audio Subordinate Node Count
> AUD_GRP_CAP           0x00000004  Audio Function Group Capabilities
> AUD_PWRST             0x00000000  Audio Power State
> AUD_SUPPWR            0x00000009  Audio Supported Power States
> AUD_SID               0x80860101  Audio Root Node Subsystem ID
> AUD_OUT_CWCAP         0x00006211  Audio Output Converter Widget Capabilities
> AUD_OUT_PCMSIZE       0x001e07f0  Audio PCM Size and Rates
> AUD_OUT_STR           0x00000005  Audio Stream Formats
> AUD_OUT_DIG_CNVT      0x00000001  Audio Digital Converter
> AUD_OUT_CH_STR        0x00000000  Audio Channel ID and Stream ID
> AUD_OUT_STR_DESC      0x00000032  Audio Stream Descriptor Format
> AUD_PINW_CAP          0x004073bd  Audio Pin Complex Widget Capabilities
> AUD_PIN_CAP           0x00000094  Audio Pin Capabilities
> AUD_PINW_CONNLNG      0x00000001  Audio Connection List Length
> AUD_PINW_CONNLST      0x00000002  Audio Connection List Entry
> AUD_PINW_CNTR         0x00000000  Audio Pin Widget Control
> AUD_PINW_UNSOLRESP    0x80000003  Audio Unsolicited Response Enable
> AUD_CNTL_ST           0x00002028  Audio Control State Register
> AUD_PINW_CONFIG       0x18560010  Audio Configuration Default
> AUD_HDMIW_STATUS      0x00000000  Audio HDMI Status
> AUD_HDMIW_HDMIEDID    0x00000000  Audio HDMI Data EDID Block
> AUD_HDMIW_INFOFR      0x00000000  Audio HDMI Widget Data Island Packet
> AUD_CONV_CHCNT        0x00000077  Audio Converter Channel Count
> AUD_CTS_ENABLE        0x00000000  Audio CTS Programming Enable
> 
> Details:
> 
> AUD_VID_DID vendor id			0x8086
> AUD_VID_DID device id			0x2803
> AUD_RID major revision			0x1
> AUD_RID minor revision			0x0
> AUD_RID revision id			0x0
> AUD_RID stepping id			0x0
> SDVOB enable				0
> SDVOB HDMI encoding			1
> SDVOB SDVO encoding			0
> SDVOB null packets			1
> SDVOB audio enabled			1
> SDVOC enable				0
> SDVOC HDMI encoding			1
> SDVOC SDVO encoding			0
> SDVOC null packets			0
> SDVOC audio enabled			0
> PORT_HOTPLUG_EN DisplayPort/HDMI port B	1
> PORT_HOTPLUG_EN DisplayPort/HDMI port C	1
> PORT_HOTPLUG_EN DisplayPort port D	0
> PORT_HOTPLUG_EN SDVOB			0
> PORT_HOTPLUG_EN SDVOC			0
> PORT_HOTPLUG_EN audio			0
> PORT_HOTPLUG_EN TV			0
> PORT_HOTPLUG_EN CRT			1
> VIDEO_DIP_CTL enable graphics DIP	1
> VIDEO_DIP_CTL port select		[0x1] Digital Port B
> VIDEO_DIP_CTL DIP buffer trans active	0
> VIDEO_DIP_CTL AVI DIP enabled		1
> VIDEO_DIP_CTL vendor DIP enabled	0
> VIDEO_DIP_CTL SPD DIP enabled		1
> VIDEO_DIP_CTL DIP buffer index		[0x3] Source Product Description DIP
> VIDEO_DIP_CTL DIP trans freq		[0x3] reserved
> VIDEO_DIP_CTL DIP buffer size		0
> VIDEO_DIP_CTL DIP address		0
> AUD_CONFIG pixel clock			[0x0] 25.2 / 1.001 MHz
> AUD_CONFIG fabrication enabled		1
> AUD_CONFIG professional use allowed	0
> AUD_CONFIG fuse enabled			0
> AUD_DEBUG function reset		0
> AUD_SUBN_CNT starting node number	0x1
> AUD_SUBN_CNT total number of nodes	0x1
> AUD_SUBN_CNT2 starting node number	0x2
> AUD_SUBN_CNT2 total number of nodes	0x2
> AUD_FUNC_GRP unsol capable		0
> AUD_FUNC_GRP node type			0x1
> AUD_GRP_CAP beep 0			0
> AUD_GRP_CAP input delay			0
> AUD_GRP_CAP output delay		4
> AUD_PWRST device power state		D0
> AUD_PWRST device power state setting	D0
> AUD_SUPPWR support D0			1
> AUD_SUPPWR support D1			0
> AUD_SUPPWR support D2			0
> AUD_SUPPWR support D3			1
> AUD_OUT_CWCAP widget type		0x0
> AUD_OUT_CWCAP sample delay		0x0
> AUD_OUT_CWCAP channel count		8
> AUD_OUT_CWCAP L-R swap			0
> AUD_OUT_CWCAP power control		0
> AUD_OUT_CWCAP digital			1
> AUD_OUT_CWCAP conn list			0
> AUD_OUT_CWCAP unsol			0
> AUD_OUT_CWCAP mute			0
> AUD_OUT_CWCAP format override		1
> AUD_OUT_CWCAP amp param override	0
> AUD_OUT_CWCAP out amp present		0
> AUD_OUT_CWCAP in amp present		0
> AUD_OUT_DIG_CNVT SPDIF category		0x0
> AUD_OUT_DIG_CNVT SPDIF level		0
> AUD_OUT_DIG_CNVT professional		0
> AUD_OUT_DIG_CNVT non PCM		0
> AUD_OUT_DIG_CNVT copyright asserted	0
> AUD_OUT_DIG_CNVT filter preemphasis	0
> AUD_OUT_DIG_CNVT validity config	0
> AUD_OUT_DIG_CNVT validity flag		0
> AUD_OUT_DIG_CNVT digital enable		1
> AUD_OUT_CH_STR stream id		0x0
> AUD_OUT_CH_STR lowest channel		0x0
> AUD_OUT_STR_DESC stream channels	0x2
> AUD_PINW_CAP widget type		0x4
> AUD_PINW_CAP sample delay		0x0
> AUD_PINW_CAP channel count		0x7
> AUD_PINW_CAP HDCP			1
> AUD_PINW_CAP L-R swap			0
> AUD_PINW_CAP power control		0
> AUD_PINW_CAP digital			1
> AUD_PINW_CAP conn list			1
> AUD_PINW_CAP unsol			1
> AUD_PINW_CAP mute			1
> AUD_PINW_CAP format override		1
> AUD_PINW_CAP amp param override		1
> AUD_PINW_CAP out amp present		1
> AUD_PINW_CAP in amp present		0
> AUD_PIN_CAP EAPD			0
> AUD_PIN_CAP HDMI			1
> AUD_PIN_CAP output			1
> AUD_PIN_CAP presence detect		1
> AUD_PINW_CNTR mute status		0
> AUD_PINW_CNTR out enable		0
> AUD_PINW_CNTR amp mute status		0
> AUD_PINW_CNTR amp mute status		0
> AUD_PINW_CNTR stream type		[0x0] default samples
> AUD_PINW_UNSOLRESP enable unsol resp	1
> AUD_CNTL_ST DIP audio enabled		0
> AUD_CNTL_ST DIP ACP enabled		0
> AUD_CNTL_ST DIP ISRCx enabled		0
> AUD_CNTL_ST DIP port select		[0x0] Reserved
> AUD_CNTL_ST DIP buffer index		[0x0] Audio DIP
> AUD_CNTL_ST DIP trans freq		[0x0] disabled
> AUD_CNTL_ST DIP address			9
> AUD_CNTL_ST CP ready			0
> AUD_CNTL_ST ELD valid			0
> AUD_CNTL_ST ELD ack			0
> AUD_CNTL_ST ELD bufsize			16
> AUD_CNTL_ST ELD address			2
> AUD_HDMIW_STATUS CDCLK/DOTCLK underrun	0
> AUD_HDMIW_STATUS CDCLK/DOTCLK overrun	0
> AUD_HDMIW_STATUS BCLK/CDCLK underrun	0
> AUD_HDMIW_STATUS BCLK/CDCLK overrun	0
> AUD_CONV_CHCNT HDMI HBR enabled		0
> AUD_CONV_CHCNT HDMI channel count	1
> AUD_CONV_CHCNT HDMI channel mapping:
> 					[0x0] 0 => 0 
> 					[0x11] 1 => 1 
> 					[0x22] 2 => 2 
> 					[0x33] 3 => 3 
> 					[0x44] 4 => 4 
> 					[0x55] 5 => 5 
> 					[0x66] 6 => 6 
> 					[0x77] 7 => 7 
> AUD_HDMIW_INFOFR HDMI audio Infoframe:
> 	00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 


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  parent reply	other threads:[~2011-11-02  8:52 UTC|newest]

Thread overview: 66+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-09-02  8:14 [PATCH v4] drm/i915: pass ELD to HDMI/DP audio driver Wu Fengguang
2011-09-02  8:29 ` Wu Fengguang
2011-09-03 21:15 ` [PATCH v5] " Wu Fengguang
2011-09-04 10:57   ` James Cloos
2011-09-05  1:19     ` Wu Fengguang
2011-09-04 11:11   ` [Intel-gfx] " Paul Menzel
2011-09-05  1:06     ` Wu Fengguang
2011-09-04 12:08   ` Chris Wilson
2011-09-05  1:14     ` Wu Fengguang
2011-09-05 11:04       ` Chris Wilson
2011-09-05 12:31         ` Wu Fengguang
     [not found]           ` <4E64C41B.5090309@pulseforce.com>
     [not found]             ` <20110905124730.GB794@localhost>
     [not found]               ` <4EA82DBD.9020301@pulseforce.com>
2011-10-27 19:57                 ` Christopher White
2011-11-09  6:59                   ` Wu Fengguang
2011-11-09  9:00                     ` Christopher White
2011-11-09  9:30                       ` Christopher White
2011-11-09 13:01                         ` Wu Fengguang
     [not found]                 ` <4EA9B6EF.9040305@pulseforce.com>
2011-11-01 11:36                   ` Wu Fengguang
2011-11-01 17:00                     ` Christopher White
2011-11-02  1:45                       ` Wu Fengguang
2011-11-02  6:10                         ` Sander Jansen
2011-11-02  7:35                           ` Paul Menzel
2011-11-02 11:17                             ` Sander Jansen
2011-11-02 14:26                               ` Sander Jansen
2011-11-02  8:52                           ` Wu Fengguang [this message]
2011-11-02 17:41                             ` Keith Packard
2011-11-04  0:21                         ` Tony Olivo
2011-11-05  0:20                         ` Christopher White
2011-11-09 13:12                           ` Wu Fengguang
2011-11-10  2:25                             ` Christopher White
2011-11-10  3:27                               ` Wu Fengguang
2011-11-10  4:10                                 ` Christopher White
2011-11-10  7:06                                   ` Wu Fengguang
2011-11-10  7:33                                   ` Wu Fengguang
2011-11-10  7:55                                     ` Wu Fengguang
2011-11-10  8:50                                       ` Wu Fengguang
2011-11-10  8:55                                       ` Christopher White
2011-11-10 11:00                                         ` Christopher White
2011-11-10 11:22                                           ` Takashi Iwai
2011-11-10 11:50                                             ` Christopher White
2011-11-10 11:53                                               ` Takashi Iwai
2011-11-10 12:39                                                 ` Christopher White
2011-11-10 13:01                                                   ` Takashi Iwai
2011-11-10 12:56                                               ` Wu Fengguang
2011-11-10 13:01                                                 ` Christopher White
2011-11-10 13:17                                                   ` Wu Fengguang
2011-11-10 13:34                                                     ` Christopher White
2011-11-10 13:47                                                       ` Wu Fengguang
2011-11-10 14:12                                                         ` Wu Fengguang
2011-11-10 13:41                                                     ` Takashi Iwai
2011-11-10 13:51                                                       ` Wu Fengguang
2011-11-10 13:53                                                         ` Wu Fengguang
2011-11-10 14:28                                                         ` Takashi Iwai
2011-11-11  2:29                                                           ` Wu Fengguang
2011-11-11  7:40                                                             ` Takashi Iwai
2011-11-11  8:22                                                               ` Wu Fengguang
2011-11-11  8:49                                                                 ` Takashi Iwai
2011-11-11  9:24                                                                   ` Wu Fengguang
2011-11-11 10:17                                                                     ` Takashi Iwai
2011-11-11 11:12                                                                       ` Wu Fengguang
2011-11-11 11:23                                                                         ` Takashi Iwai
2011-11-11 11:32                                                                           ` Wu Fengguang
2011-11-12  2:27                                                                   ` Wu Fengguang
2011-11-14  9:45                                                                     ` Takashi Iwai
2011-11-14 13:25                                                                       ` Wu Fengguang
2011-11-15 17:18                                                                         ` Purushothaman, Vijay A
2011-11-10  6:59                               ` Wu Fengguang

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