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Date:   Wed, 16 Nov 2011 00:59:54 +0000
From:   Ralf Baechle <ralf@linux-mips.org>
To:     ddaney.cavm@gmail.com
Cc:     linux-mips@linux-mips.org, David Daney <david.daney@cavium.com>
Subject: Re: [PATCH 1/5] MIPS: Octeon: Update SOC PCI related register
 definitions for new chips.
Message-ID: <20111116005954.GO25384@linux-mips.org>
References: <1321400775-32353-1-git-send-email-ddaney.cavm@gmail.com>
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Queued for 3.3.  Thanks,

  Ralf