From: Marek Vasut <marek.vasut@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 07/11] MIPS: extend cache initialization for MIPS24K and MIPS34K cores
Date: Fri, 25 Nov 2011 09:46:07 +0100 [thread overview]
Message-ID: <201111250946.07255.marek.vasut@gmail.com> (raw)
In-Reply-To: <1322143076-20349-8-git-send-email-daniel.schwierzeck@googlemail.com>
> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
> ---
> arch/mips/cpu/mips32/cache.S | 18 ++++++++++++++++++
> arch/mips/include/asm/mipsregs.h | 9 ++++++++-
> 2 files changed, 26 insertions(+), 1 deletions(-)
>
> diff --git a/arch/mips/cpu/mips32/cache.S b/arch/mips/cpu/mips32/cache.S
> index e683e8b..4801511 100644
> --- a/arch/mips/cpu/mips32/cache.S
> +++ b/arch/mips/cpu/mips32/cache.S
> @@ -34,6 +34,14 @@
> #define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT
> #endif
>
> +#ifdef CONFIG_SYS_CPU_MIPS24K
#if defined(...) || defined(...) maybe?
> +#define CONFIG_SYS_MIPS_CACHE_EXT_INIT
> +#endif
> +
> +#ifdef CONFIG_SYS_CPU_MIPS34K
> +#define CONFIG_SYS_MIPS_CACHE_EXT_INIT
> +#endif
> +
> #define RA t8
>
> /*
> @@ -81,7 +89,12 @@
> */
> LEAF(mips_init_icache)
> blez a1, 9f
> +#ifdef CONFIG_SYS_MIPS_CACHE_EXT_INIT
> + mtc0 zero, CP0_ITAGLO
> + mtc0 zero, CP0_IDATALO
> +#else
> mtc0 zero, CP0_TAGLO
> +#endif
> /* clear tag to invalidate */
> PTR_LI t0, INDEX_BASE
> PTR_ADDU t1, t0, a1
> @@ -106,7 +119,12 @@ LEAF(mips_init_icache)
> */
> LEAF(mips_init_dcache)
> blez a1, 9f
> +#ifdef CONFIG_SYS_MIPS_CACHE_EXT_INIT
> + mtc0 zero, CP0_DTAGLO
> + mtc0 zero, CP0_DDATALO
> +#else
> mtc0 zero, CP0_TAGLO
> +#endif
> /* clear all tags */
> PTR_LI t0, INDEX_BASE
> PTR_ADDU t1, t0, a1
> diff --git a/arch/mips/include/asm/mipsregs.h
> b/arch/mips/include/asm/mipsregs.h index 15a9fd5..07a3cf6 100644
> --- a/arch/mips/include/asm/mipsregs.h
> +++ b/arch/mips/include/asm/mipsregs.h
> @@ -93,7 +93,14 @@
> * These registers are listed for completeness and are intended
> * for usage in assembly code.
> */
> -#define CP0_EBASE $15,1
> +#define CP0_EBASE $15,1
> +/* L1 I-Cache */
> +#define CP0_ITAGLO $28
> +#define CP0_IDATALO $28,1
> +#define CP0_IDATAHI $29,1
> +/* L1 D-Cache */
> +#define CP0_DTAGLO $28,2
> +#define CP0_DDATALO $28,3
>
> /*
> * Coprocessor 0 Set 1 register names
Otherwise, this looks good:
Acked-by: Marek Vasut <marek.vasut@gmail.com>
next prev parent reply other threads:[~2011-11-25 8:46 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-11-24 13:57 [U-Boot] [PATCH 00/11] MIPS: fixes and updates Daniel Schwierzeck
2011-11-24 13:57 ` [U-Boot] [PATCH 01/11] MIPS: board.c: make checkpatch.pl clean Daniel Schwierzeck
2011-11-25 8:38 ` Marek Vasut
2011-11-30 12:39 ` [U-Boot] [PATCH v2 " Daniel Schwierzeck
2011-12-09 9:52 ` [U-Boot] [PATCH " Wolfgang Denk
2011-11-24 13:57 ` [U-Boot] [PATCH 02/11] MIPS: board.c: fix warning if CONFIG_CMD_NET is not defined Daniel Schwierzeck
2011-11-25 8:39 ` Marek Vasut
2011-11-25 12:37 ` Daniel Schwierzeck
2011-11-25 13:41 ` Marek Vasut
2011-12-09 9:50 ` Wolfgang Denk
2011-12-09 12:34 ` Daniel Schwierzeck
2011-11-24 13:57 ` [U-Boot] [PATCH 03/11] MIPS: board.c: fix init of flash data in bd_info Daniel Schwierzeck
2011-11-25 8:40 ` Marek Vasut
2011-11-24 13:57 ` [U-Boot] [PATCH 04/11] MIPS: add register definition for EBase register Daniel Schwierzeck
2011-11-25 8:43 ` Marek Vasut
2011-11-25 12:10 ` Daniel Schwierzeck
2011-11-24 13:57 ` [U-Boot] [PATCH 05/11] MIPS: add sleep handler for slave CPUs in multi-processor systems Daniel Schwierzeck
2011-11-25 8:44 ` Marek Vasut
2011-11-25 12:19 ` Daniel Schwierzeck
2011-11-25 13:40 ` Marek Vasut
2011-11-25 15:35 ` Andrew Dyer
2011-11-28 16:24 ` Shinya Kuribayashi
2011-11-29 15:54 ` Daniel Schwierzeck
2011-11-24 13:57 ` [U-Boot] [PATCH 06/11] MIPS: make cache operation mode configurable in dcache_enable() Daniel Schwierzeck
2011-11-25 8:45 ` Marek Vasut
2011-11-24 13:57 ` [U-Boot] [PATCH 07/11] MIPS: extend cache initialization for MIPS24K and MIPS34K cores Daniel Schwierzeck
2011-11-25 8:46 ` Marek Vasut [this message]
2011-11-30 12:39 ` [U-Boot] [PATCH v2 07/10] MIPS: extend cache initialization for recent MIPS CPU cores Daniel Schwierzeck
2011-11-24 13:57 ` [U-Boot] [PATCH 08/11] MIPS: add additional reserved vectors for MIPS24K and MIPS34K cores Daniel Schwierzeck
2011-11-25 8:47 ` Marek Vasut
2011-11-28 16:48 ` Shinya Kuribayashi
2011-11-29 15:44 ` Daniel Schwierzeck
2011-11-30 12:39 ` [U-Boot] [PATCH v2 08/10] MIPS: start.S: refactor reset and exception vector setup Daniel Schwierzeck
2011-11-24 13:57 ` [U-Boot] [PATCH 09/11] MIPS: add header file for generic GPIO API Daniel Schwierzeck
2011-11-25 8:48 ` Marek Vasut
2011-11-24 13:57 ` [U-Boot] [PATCH 10/11] MIPS: add init hook for CPU specific initialization Daniel Schwierzeck
2011-11-25 8:49 ` Marek Vasut
2012-03-31 20:53 ` Marek Vasut
2011-11-24 13:57 ` [U-Boot] [PATCH 11/11] MIPS: MAKEALL: fix lists for MIPSel and MIPS boards Daniel Schwierzeck
2011-11-24 17:41 ` Mike Frysinger
2011-11-25 8:49 ` Marek Vasut
2011-11-25 12:29 ` Daniel Schwierzeck
2011-11-25 15:21 ` thomas.langer at lantiq.com
2011-11-25 19:52 ` Mike Frysinger
2011-12-09 9:53 ` Wolfgang Denk
2012-03-31 20:49 ` [U-Boot] [PATCH 00/11] MIPS: fixes and updates Marek Vasut
2012-04-02 11:54 ` Daniel Schwierzeck
2012-04-02 12:01 ` Anatolij Gustschin
2012-04-02 12:20 ` Daniel Schwierzeck
2012-04-02 13:35 ` Marek Vasut
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