From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Widawsky Subject: Re: Is MI_FLUSH_ENABLE bit 12? Date: Wed, 30 Nov 2011 03:42:00 +0000 Message-ID: <20111130034200.GA7069@cloud01> References: <861usr63vf.fsf@sumi.keithp.com> <87zkfephaa.fsf@eliezer.anholt.net> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1437246518==" Return-path: Received: from cloud01.chad-versace.us (184-106-247-128.static.cloud-ips.com [184.106.247.128]) by gabe.freedesktop.org (Postfix) with ESMTP id C99D29EB2E for ; Tue, 29 Nov 2011 19:41:29 -0800 (PST) In-Reply-To: <87zkfephaa.fsf@eliezer.anholt.net> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Eric Anholt Cc: "drivers, Intel" List-Id: intel-gfx@lists.freedesktop.org --===============1437246518== Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="YiEDa0DAkWCtVeE4" Content-Disposition: inline --YiEDa0DAkWCtVeE4 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Nov 29, 2011 at 04:47:57PM -0800, Eric Anholt wrote: > On Mon, 28 Nov 2011 18:48:04 -0800, "Keith Packard" w= rote: > Non-text part: multipart/mixed > Non-text part: multipart/signed > >=20 > > Just reading through vol1c.4 of the bspec this evening and found somet= hing odd. > >=20 > > Bit 11 of MI_MODE is "Invalidate UHPTR enable". > > Bit 12 of MI_MODE is "MI_FLUSH Enable" > >=20 > > And, yet, in i915_reg.h: > >=20 > > #define MI_MODE 0x0209c > > # define VS_TIMER_DISPATCH (1 << 6) > > # define MI_FLUSH_ENABLE (1 << 11) > >=20 > > Are we off-by-one on MI_FLUSH_ENABLE? Seems like this would cause > > serious problems... >=20 > I think we are. On the other hand, based on actual behavior plus > reading of simulator, I believe that the bit does nothing, regardless. I do not think so. We've (Chris, I, and perhaps Jesse?) been through this excercise at least twice before, and both times resulted in hangs when we switched to bit 12 on Ironlake, not sure about other platforms. Ben --YiEDa0DAkWCtVeE4 Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQEcBAEBAgAGBQJO1aYIAAoJEL9nTIiJEj0ppZ4IAIFPzaIxQoWB97DkYvqTL6Ve l9RZ5OcniGyIRL04DufQabRZpNUHbFT3QuV5Hrty9ZOWjBnWz4aLOrtutOfNnioj bHba3QMNTkYa38gnydHxHpdnzu8C35QtzpLcsYKS2HvRcwZJVE3OkI4xGxxBBtH1 cw0QbdD1YejJq49ppiCQ1J0g4feUpzCb7FJM4XNBeYzMGrJl3tMwnkQRjX+SD49V KiPqnzrrYjM1pJ3JV6QMIrMRvz9mI2DrVJ/LyZvQvIRokvSuQ2ESfqY8si+nO2N4 6Z8wi8+tbapIzf8bJp7Nf3UvfffrVv6xRrHeOoeo6PC2Zk8h79aoMAogvO5mXrc= =/Eos -----END PGP SIGNATURE----- --YiEDa0DAkWCtVeE4-- --===============1437246518== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============1437246518==--