From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jesse Barnes Subject: Re: [PATCH 2/3] drm/i915: Force sync command ordering (Gen6+) Date: Wed, 7 Dec 2011 13:03:29 -0800 Message-ID: <20111207130329.1f5fb6c1@jbarnes-desktop> References: <1319337685-26195-1-git-send-email-ben@bwidawsk.net> <1319337685-26195-2-git-send-email-ben@bwidawsk.net> <87fwgwfcvy.fsf@eliezer.anholt.net> <20111207103841.7627b5fe@jbarnes-desktop> <20111207115805.13f5cfde@jbarnes-desktop> <87ty5cf6hc.fsf@eliezer.anholt.net> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0064354727==" Return-path: Received: from oproxy9.bluehost.com (oproxy9.bluehost.com [69.89.24.6]) by gabe.freedesktop.org (Postfix) with SMTP id 7FA859E81E for ; Wed, 7 Dec 2011 13:03:32 -0800 (PST) In-Reply-To: <87ty5cf6hc.fsf@eliezer.anholt.net> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Eric Anholt Cc: Ben Widawsky , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============0064354727== Content-Type: multipart/signed; micalg=PGP-SHA1; boundary="Sig_/1/lAGNyV2UEeocZAJrvedGX"; protocol="application/pgp-signature" --Sig_/1/lAGNyV2UEeocZAJrvedGX Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable On Wed, 07 Dec 2011 12:54:07 -0800 Eric Anholt wrote: > On Wed, 7 Dec 2011 11:58:05 -0800, Jesse Barnes wrote: > > On Wed, 7 Dec 2011 10:38:41 -0800 > > Jesse Barnes wrote: > >=20 > > > On Wed, 07 Dec 2011 10:35:45 -0800 > > > Eric Anholt wrote: > > >=20 > > > > On Sat, 22 Oct 2011 19:41:24 -0700, Ben Widawsky = wrote: > > > > > The docs say this is required for Gen7, and since the bit was add= ed for > > > > > Gen6, we are also setting it there pit pf paranoia. Particularly = as > > > > > Chris points out, if PIPE_CONTROL counts as a 3d state packet. > > > > >=20 > > > > > This was found through doc inspection by Ken and applies to Gen6+; > > > > >=20 > > > > > Cc: Keith Packard > > > > > Reported-by: Kenneth Graunke > > > > > Signed-off-by: Ben Widawsky > > > > > Reviewed-by: Chris Wilson > > > > > Reviewed-by: Daniel Vetter > > > >=20 > > > > Reviewed-by: Eric Anholt > > > >=20 > > > > however, it doesn't appear to help Ivybridge IRQ troubles. > > >=20 > > > You could try something like the below to force the use of PIPE_NOTIFY > > > instead. Only lightly tested on IVB when we had lots of other bugs, = so > > > I'm not sure if it works at all. > >=20 > > Though if it's the blit ring hanging, you'd have to try using a > > flush_dw notify (if such a thing exists) instead... >=20 > Yeah, MI_FLUSH_DW as opposed to MI_STORE_DW + MI_USER_INTERRUPT. Looks like there is a notify option, bit 8 of MI_FLUSH_DW. It's a long shot, but does anyone want to give it a try? --=20 Jesse Barnes, Intel Open Source Technology Center --Sig_/1/lAGNyV2UEeocZAJrvedGX Content-Type: application/pgp-signature; name=signature.asc Content-Disposition: attachment; filename=signature.asc -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) iQIcBAEBAgAGBQJO39ShAAoJEIEoDkX4Qk9htBUQAIKIdhsLlMESwT76oC5CJl6A wxmchhaXcp3RqX3ZSeUABB0rV7VSXLiExRfDLbG55iRXfCi3B+P3/bh/fB+08WkX FlxhCmewzKua+DK0e5Tf03pBAnxP8kz7ezgEipj8ATRPxqapxpJCVZRM+urAvgda pAqKsThvzRvlodQQqQf7VkEW9qbDahCVr452d6XuzR5BnJF60BBNAIvBKnePSC46 tsBG8SguYR0M00pPo/9mtQSc0hH/Xk7sIP64mE7d+nzyrX1RviI+9G43pG4x/sZG 9iEsdX7e6ElTV7nQIeJzJiZoiRvekglm8oi2rvZizePYZEVW+ZLsDbiSkrNVcvUv 43UMq1ApsYlNxamxZqaiBPfdNaWKzaUONSs4LXgXSN6+Ue9gGG0YF1XNHosNr+0a Tj128ZICUYuaEz5EPbqFB42YHeLDi8URMUNsvLB9OlgfxkzPwx3G3oa5MCBN7C3A GoLB2wKV+8jILP4iD4Cf0zNec5v5nJTwMIuW8FPXo0diirGGINn7ry1JKA+Puq/+ DTH4sK+zEHWOplXJZqOOjjWlmizGJHFW3z6CJB4jqYHTObPDUN57Ue+sdaxb7Cat cSYeFWJzyMIh2Al5OK1/g9OZ4LvyNxWuEbgW+1WtUHtg52FIWihfwIkAo4iJCoF8 mjethpBpSb2m15YheYcq =K3Ei -----END PGP SIGNATURE----- --Sig_/1/lAGNyV2UEeocZAJrvedGX-- --===============0064354727== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0064354727==--