From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/4] Add condition code checking to SWP emulation handler.
Date: Sat, 10 Dec 2011 13:22:23 +0000 [thread overview]
Message-ID: <20111210132222.GD8292@mudshark.cambridge.arm.com> (raw)
In-Reply-To: <20111209185450.19655.63570.stgit@localhost6.localdomain6>
On Fri, Dec 09, 2011 at 06:54:57PM +0000, Leif Lindholm wrote:
> This patch fixes two separate issues with the SWP emulation handler:
> 1: Certain processors implementing ARMv7-A can (legally) take an
> undef exception even when the condition code would have meant that
> the instruction should not have been executed.
> 2: Opcodes with all flags set (condition code = 0xf) have been reused
> in recent, and not-so-recent, versions of the ARM architecture to
> implement unconditional extensions to the instruction set. The
> existing code would still have processed any undefs triggered by
> executing an opcode with such a value.
>
> This patch uses the new generic ARM instruction set condition code
> checks to implement proper handling of these situations.
>
> Signed-off-by: Leif Lindholm <leif.lindholm@arm.com>
> ---
> arch/arm/kernel/swp_emulate.c | 16 ++++++++++++++++
> 1 files changed, 16 insertions(+), 0 deletions(-)
Reviewed-by: Will Deacon <will.deacon@arm.com>
Will
next prev parent reply other threads:[~2011-12-10 13:22 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-12-09 18:54 [PATCH 0/4] Add generic ARM ISA condition code check v3 Leif Lindholm
2011-12-09 18:54 ` [PATCH 1/4] Add generic ARM instruction set condition code checks Leif Lindholm
2011-12-10 13:20 ` Will Deacon
2011-12-09 18:54 ` [PATCH 2/4] Use generic ARM instruction set condition code checks for nwfpe Leif Lindholm
2011-12-10 13:21 ` Will Deacon
2011-12-09 18:54 ` [PATCH 3/4] Add condition code checking to SWP emulation handler Leif Lindholm
2011-12-10 13:22 ` Will Deacon [this message]
2011-12-09 18:55 ` [PATCH 4/4] Use generic ARM instruction set condition code checks for kprobes Leif Lindholm
2011-12-10 9:19 ` Tixy
2011-12-10 13:24 ` Will Deacon
-- strict thread matches above, loose matches on Subject: below --
2011-12-08 17:31 [PATCH 0/4] Add generic ARM ISA condition code check Leif Lindholm
2011-12-08 17:32 ` [PATCH 3/4] Add condition code checking to SWP emulation handler Leif Lindholm
2011-12-09 16:06 ` Will Deacon
2011-11-25 17:19 [PATCH 0/4] Add generic ARM ISA condition code checks Leif Lindholm
2011-11-25 17:19 ` [PATCH 3/4] Add condition code checking to SWP emulation handler Leif Lindholm
2011-11-30 17:01 ` Dave Martin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20111210132222.GD8292@mudshark.cambridge.arm.com \
--to=will.deacon@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.