[U-Boot] [PATCH 00/18] CHECKPATCH: fpgadata.c cleanup

[Marek Vasut <marek.vasut@gmail.com>]

> Hi Marek,
> 
> On Wed, Dec 14, 2011 at 11:37 AM, Marek Vasut <marek.vasut@gmail.com> wrote:
> >> Hi Marek,
> >> 
> >> On Wed, Dec 14, 2011 at 10:49 AM, Marek Vasut <marek.vasut@gmail.com> 
wrote:
> >> > First of the CHECKPATCH series of patches with per-file checkpatch
> >> > fixes.
> >> > 
> >> > This series fixes all files fpgadata.c, which contains PPC FPGA
> >> > firmwares. There are no functional changes, only CHECKPATCH fixes.
> >> > 
> >> > Marek Vasut (18):
> >> >  CHECKPATCH: ./board/esd/hh405/fpgadata.c
> >> >  CHECKPATCH: ./board/esd/pci405/fpgadata.c
> >> >  CHECKPATCH: ./board/esd/tasreg/fpgadata.c
> >> >  CHECKPATCH: ./board/esd/apc405/fpgadata.c
> >> >  CHECKPATCH: ./board/esd/voh405/fpgadata.c
> >> >  CHECKPATCH: ./board/esd/ash405/fpgadata.c
> >> >  CHECKPATCH: ./board/esd/dasa_sim/fpgadata.c
> >> >  CHECKPATCH: ./board/esd/ar405/fpgadata_xl30.c
> >> >  CHECKPATCH: ./board/esd/ar405/fpgadata.c
> >> >  CHECKPATCH: ./board/esd/plu405/fpgadata.c
> >> >  CHECKPATCH: ./board/esd/wuh405/fpgadata.c
> >> >  CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci405.c
> >> >  CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci405ab.c
> >> >  CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci4052.c
> >> >  CHECKPATCH: ./board/esd/canbt/fpgadata.c
> >> >  CHECKPATCH: ./board/esd/du405/fpgadata.c
> >> >  CHECKPATCH: ./board/esd/cpciiser4/fpgadata.c
> >> >  CHECKPATCH: ./board/dave/PPChameleonEVB/fpgadata.c
> >> > 
> >> >  board/dave/PPChameleonEVB/fpgadata.c   | 2657 ++++---
> >> >  board/esd/apc405/fpgadata.c            | 4676 +++++++-----
> >> >  board/esd/ar405/fpgadata.c             | 6417 ++++++++++-------
> >> >  board/esd/ar405/fpgadata_xl30.c        | 5684 +++++++++-------
> >> >  board/esd/ash405/fpgadata.c            | 5814 +++++++++-------
> >> >  board/esd/canbt/fpgadata.c             |  942 ++--
> >> >  board/esd/cpci405/fpgadata_cpci405.c   |  798 ++-
> >> >  board/esd/cpci405/fpgadata_cpci4052.c  | 1785 +++--
> >> >  board/esd/cpci405/fpgadata_cpci405ab.c | 2998 +++++----
> >> >  board/esd/cpciiser4/fpgadata.c         | 4825 +++++++------
> >> >  board/esd/dasa_sim/fpgadata.c          | 4554 +++++++-----
> >> >  board/esd/du405/fpgadata.c             | 1640 +++--
> >> >  board/esd/hh405/fpgadata.c             | 5873 +++++++++-------
> >> >  board/esd/pci405/fpgadata.c            | 1741 +++--
> >> >  board/esd/plu405/fpgadata.c            | 2751 ++++---
> >> >  board/esd/tasreg/fpgadata.c            |12439
> >> > ++++++++++++++++++-------------- board/esd/voh405/fpgadata.c
> >> >  | 4692 +++++++------
> >> >  board/esd/wuh405/fpgadata.c            | 4242 +++++++-----
> >> >  18 files changed, 42586 insertions(+), 31942 deletions(-)
> >> 
> >> Just looking at the first ones to come through, you've changed them
> >> from having 16 bytes of data (i.e. one word) per line to 12. I
> >> personally prefer the 80 line rule being broken in favour of having a
> >> neat number of bytes per line...
> >> 
> >> Regards,
> >> 
> >> Graeme
> > 
> > Hi Graeme,
> > 
> > I can realign them to 8 bytes, but I'd prefer to see them checkpatch
> > comformant.
> 
> Would make for long files, but at least it's better than a 12-byte
> alignment.
> 
> I have a similar binary blob data file myself for an upcoming patch
> series - The format is only personal preference on my part, and I'm
> more than happy to go with a majority consensus
> 
> Regards,
> 
> Graeme

Well, I reformated these patches for 8-bytes per line. And I also reformated 
logo_* files in board/... (mostly ESD ppc systems). Wolfgang, will you be OK if 
I apply these reformating patches directly on staging and send you a pull RQ (I 
already know the answer will not be possitive here though, but I had to try ;-) 
)? Sending them to ML seems problematic.

M