From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755183Ab1LNHyI (ORCPT ); Wed, 14 Dec 2011 02:54:08 -0500 Received: from mx3.mail.elte.hu ([157.181.1.138]:49401 "EHLO mx3.mail.elte.hu" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753892Ab1LNHyE (ORCPT ); Wed, 14 Dec 2011 02:54:04 -0500 Date: Wed, 14 Dec 2011 08:52:10 +0100 From: Ingo Molnar To: Tony Luck Cc: linux-kernel@vger.kernel.org, Borislav Petkov , "Huang, Ying" , Hidetoshi Seto Subject: Re: [PATCH 4/6] x86, mce: Add mechanism to safely save information in MCE handler Message-ID: <20111214075210.GE25232@elte.hu> References: <21784ca9d3f0a59c01c9d127a088077561616ba1.1323803130.git.tony.luck@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <21784ca9d3f0a59c01c9d127a088077561616ba1.1323803130.git.tony.luck@intel.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-ELTE-SpamScore: -2.0 X-ELTE-SpamLevel: X-ELTE-SpamCheck: no X-ELTE-SpamVersion: ELTE 2.0 X-ELTE-SpamCheck-Details: score=-2.0 required=5.9 tests=AWL,BAYES_00 autolearn=no SpamAssassin version=3.3.1 -2.0 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.0 AWL AWL: From: address is in the auto white-list Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Tony Luck wrote: > Machine checks on Intel cpus interrupt execution on all cpus, regardless > of interrupt masking. We have a need to save some data about the cause > of the machine check (physical address) in the machine check handler that > can be retrieved later to attempt recovery in a more flexible execution > state. > > Signed-off-by: Tony Luck > --- > arch/x86/kernel/cpu/mcheck/mce.c | 51 ++++++++++++++++++++++++++++++++++++++ > 1 files changed, 51 insertions(+), 0 deletions(-) Just some cleanliness nits: > diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c > index 43f22c8..9b83b7d 100644 > --- a/arch/x86/kernel/cpu/mcheck/mce.c > +++ b/arch/x86/kernel/cpu/mcheck/mce.c > @@ -887,6 +887,57 @@ static void mce_clear_state(unsigned long *toclear) > } > > /* > + * Need to save faulting physical address associated with a process > + * in the machine check handler some place where we can grab it back > + * later in mce_notify_process() > + */ > +#define MAX_MCE_INFO 16 > +struct mce_info { please separate non-bulk definitons by newlines. > + atomic_t inuse; > + struct task_struct *t; > + __u64 paddr; > +} mce_info[MAX_MCE_INFO]; > + > +static void mce_save_info(__u64 addr) > +{ > + int i; that tab looks weird. [there's repeat occurances further below as well] > + > + for (i = 0; i < MAX_MCE_INFO; i++) > + if (atomic_cmpxchg(&mce_info[i].inuse, 0, 1) == 0) { > + mce_info[i].t = current; > + mce_info[i].paddr = addr; > + return; > + } We typically use curly braces for all multi-line statements - so two would be needed above. > + > + mce_panic("Too many concurrent recoverable errors", NULL, NULL); > +} > + > +static int mce_find_info(__u64 *paddr) > +{ > + int i; > + > + for (i = 0; i < MAX_MCE_INFO; i++) > + if (atomic_read(&mce_info[i].inuse) && > + mce_info[i].t == current) { > + *paddr = mce_info[i].paddr; > + return 1; > + } > + return 0; > +} > + > +static void mce_clear_info(void) > +{ > + int i; > + > + for (i = 0; i < MAX_MCE_INFO; i++) > + if (atomic_read(&mce_info[i].inuse) && > + mce_info[i].t == current) { the line-break shows that the code has complexit troubles. Doing this in the loop iterator: struct mce_info *mi = mce_info + i; would help make it shorter and more readable. Thanks, Ingo