From mboxrd@z Thu Jan 1 00:00:00 1970 From: Gleb Natapov Subject: Re: [RFC] KVM: x86: emulate movdqa Date: Sun, 8 Jan 2012 18:36:10 +0200 Message-ID: <20120108163610.GF2167@redhat.com> References: <1325932011-2728-1-git-send-email-stefanha@linux.vnet.ibm.com> <4F0970DB.6060405@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=koi8-r Content-Transfer-Encoding: QUOTED-PRINTABLE Cc: Avi Kivity , Stefan Hajnoczi , kvm@vger.kernel.org, Takuya Yoshikawa To: Stefan Hajnoczi Return-path: Received: from mx1.redhat.com ([209.132.183.28]:19599 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753935Ab2AHQgQ convert rfc822-to-8bit (ORCPT ); Sun, 8 Jan 2012 11:36:16 -0500 Content-Disposition: inline In-Reply-To: Sender: kvm-owner@vger.kernel.org List-ID: On Sun, Jan 08, 2012 at 04:21:56PM +0000, Stefan Hajnoczi wrote: > On Sun, Jan 8, 2012 at 10:32 AM, Avi Kivity wrote: > > On 01/07/2012 12:26 PM, Stefan Hajnoczi wrote: > >> > >> movdqa %xmm0,(%rdi) > >> > >> This patch adds movdqa to the emulator but does not implement #GP = when > >> the memory operand is unaligned to 16 bytes. =9AI'm not sure wheth= er > >> alignment checking can be implemented as an opcode .flag or if it = needs > >> to be done in em_movdqa(). > > > > It should actually be automatic when the Sse flag is present, since= it's > > the norm for almost all SSE instructions. =9AThere should be a .fla= g to > > override it for movdqu. >=20 > When writing a kvm-unit-test for movdqa I found that alignment > checking happens before the page fault (makes sense). That means > misalignment is detected by the CPU while still in guest mode. The > emulator never sees the instruction because #GP is raised and handled > in the guest. >=20 > I also didn't see other instances of alignment checking in the > emulator (e.g. eflags AC). I guess the same situation applies there. >=20 > Can you think of a case where we need to perform alignment checking i= n > the emulator? >=20 Any instruction can be fed to emulator on smp guest. Make one vcpu enter emulator by some instruction that does io and replace it by another instruction on a second vcpu. If replacing will happen before first vcpu emulates fetch, instruction written by the second vcpu will = be emulated. This is why emulator has to perform all security checks even if cpu does them before exit. Alignment checking is probably not security sensitive though. -- Gleb.