From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH] drm/i915:: Disable FBC on SandyBridge Date: Tue, 17 Jan 2012 11:57:05 +0100 Message-ID: <20120117105705.GH4093@phenom.ffwll.local> References: <1320794254-3114-1-git-send-email-chris@chris-wilson.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ww0-f43.google.com (mail-ww0-f43.google.com [74.125.82.43]) by gabe.freedesktop.org (Postfix) with ESMTP id 475C79ECFB for ; Tue, 17 Jan 2012 02:57:09 -0800 (PST) Received: by wgbdr11 with SMTP id dr11so2373967wgb.12 for ; Tue, 17 Jan 2012 02:57:08 -0800 (PST) Content-Disposition: inline In-Reply-To: <1320794254-3114-1-git-send-email-chris@chris-wilson.co.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson , Eugeni Dodonov Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Tue, Nov 08, 2011 at 11:17:34PM +0000, Chris Wilson wrote: > Enabling FBC is causing the BLT ring to run between 10-100x slower than > normal and frequently lockup. The interim solution is disable FBC once > more until we know why. > > Signed-off-by: Chris Wilson Iirc fbc isn't really worth it power-wise on snb and we don't implement it on ivb. So shouldn't we just disable it completely? Eugeni, any opinions - I think you're most up to speed on power saving figures for snb? -Daniel > --- > drivers/gpu/drm/i915/intel_display.c | 2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 9fa342e..f972a09 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -1864,7 +1864,7 @@ static void intel_update_fbc(struct drm_device *dev) > if (enable_fbc < 0) { > DRM_DEBUG_KMS("fbc set to per-chip default\n"); > enable_fbc = 1; > - if (INTEL_INFO(dev)->gen <= 5) > + if (INTEL_INFO(dev)->gen <= 6) > enable_fbc = 0; > } > if (!enable_fbc) { > -- > 1.7.7.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48