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From: Daniel Vetter <daniel@ffwll.ch>
To: "Sun, Yi" <yi.sun@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH-v2 0/3] drm/i915: interlaced mode support
Date: Thu, 19 Jan 2012 11:28:35 +0100	[thread overview]
Message-ID: <20120119102835.GA3779@phenom.ffwll.local> (raw)
In-Reply-To: <D9F66AA509623343B6A9A3D4502D5A520FCACBBC@SHSMSX102.ccr.corp.intel.com>

On Thu, Jan 19, 2012 at 09:51:16AM +0000, Sun, Yi wrote:
> > > This patch set enables enables interlaced mode output on generation 3
> > > and above chipsets.
> > >
> > > History here: https://bugs.freedesktop.org/show_bug.cgi?id=11220
> > >
> > > It has been tested on the following hardware:
> > > * ASUS P5E-VM-HDMI (G35_G) and LG 32FS4D (VGA and SDVO connectors)
> > > * Intel DQ45CB (Q45_G) and Sony GDM 5411 (VGA connector)
> > > * Toshiba Portege R500 (I935_GM) and Sony GDM 5411 CRT (VGA connector)
> > >
> > > PATCH HISTORY
> > > Version 1. Initial cut.
> > > Version 2. Set timings for gen3 and ILK/SB chipsets.
> > >            Allow interlaced output on HDMI connector.
> > >
> > > Peter Ross (3):
> > >   drm/i915: specify vertical timings in frame units for interlaced
> > >     modes (gen3+)
> > >   drm/i915: allow interlaced mode output on the SDVO connector
> > >   drm/i915: allow interlaced mode output on the HDMI connector
> > >
> > >  drivers/gpu/drm/i915/intel_display.c |   14 ++++++++++++++
> > >  drivers/gpu/drm/i915/intel_hdmi.c    |    2 +-
> > >  drivers/gpu/drm/i915/intel_sdvo.c    |    2 +-
> > >  3 files changed, 16 insertions(+), 2 deletions(-)
> > 
> > Cool, this series looks good.
> > 
> > Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> > 
> > Yi, can you give these patches a try with interlaced modes on SDVO and HDMI
> > attached displays and reply with your tested-by?
> > 
> 
> I tried the 3 patches on 3 machines, gm45(HDMI), g45(SDVO-HDMI) and a SandyBridge mobile(HDMI).
> The patches work well on gm45 with HDMI and g45 with SDVO-HDMI card. I could reproduce the issue and fix it.
> 
> But on the SandyBridge, it seems that the issue still exists.
> 
> Tested-by: Sun Yi <yi.sun@intel.com>

So I guess it works on pre-PCH_SPLIT machines, but not on later ones.
Peter, on which machines have you tried this out?
-Daniel
-- 
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48

  reply	other threads:[~2012-01-19 10:28 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-01-18 13:29 [PATCH-v2 0/3] drm/i915: interlaced mode support Peter Ross
2012-01-18 13:30 ` [PATCH-v2 1/3] drm/i915: specify vertical timings in frame units for interlaced modes (gen3+) Peter Ross
2012-01-18 13:30 ` [PATCH-v2 2/3] drm/i915: allow interlaced mode output on the SDVO connector Peter Ross
2012-01-18 13:30 ` [PATCH-v2 3/3] drm/i915: allow interlaced mode output on the HDMI connector Peter Ross
2012-01-18 16:42 ` [PATCH-v2 0/3] drm/i915: interlaced mode support Jesse Barnes
2012-01-19  9:51   ` Sun, Yi
2012-01-19 10:28     ` Daniel Vetter [this message]
2012-01-18 17:27 ` Eugeni Dodonov
2012-01-18 20:39 ` Paulo Zanoni
2012-01-18 20:55   ` Jesse Barnes
2012-01-20 11:24     ` Peter Ross
2012-01-22  7:14       ` Peter Ross
2012-01-22  9:38         ` Peter Ross
2012-01-19 10:29   ` Daniel Vetter
  -- strict thread matches above, loose matches on Subject: below --
2012-01-19 11:38 Peter Ross
2012-01-19 12:23 ` Paulo Zanoni

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