From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 2/2] drm/i915: Correct the bit number for the MI_FLUSH_ENABLE. Date: Sat, 21 Jan 2012 17:36:13 +0100 Message-ID: <20120121163613.GE3821@phenom.ffwll.local> References: <1326999006-15100-1-git-send-email-eric@anholt.net> <1326999006-15100-2-git-send-email-eric@anholt.net> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wi0-f177.google.com (mail-wi0-f177.google.com [209.85.212.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 983C79E76B for ; Sat, 21 Jan 2012 08:36:15 -0800 (PST) Received: by wibhq15 with SMTP id hq15so1456841wib.36 for ; Sat, 21 Jan 2012 08:36:14 -0800 (PST) In-Reply-To: <1326999006-15100-2-git-send-email-eric@anholt.net> Content-Disposition: inline List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Eric Anholt Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Thu, Jan 19, 2012 at 10:50:06AM -0800, Eric Anholt wrote: > Older specs claimed this was bit 11, but newer specs and the actual > simulator code say it was bit 12. Regardless, we don't use MI_FLUSH, > or try to enable it any more. > > Signed-off-by: Eric Anholt I'd like to amend this with the following (on this patch instead of the other, so that ppl actually can find it with git blame): "Furthermore actually setting bit12 results in gpu hangs both on snb and ivb. Ben Widawsky discovered a ppt that claims that both bit12 and bit11 must be set, but that doesn't help either. And last but not least, MI_FLUSH seems to work regardless of the setting of these bits." Eric, Ben, is that ok? -Daniel -- Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48