diff for duplicates of <20120126145915.GG6269@8bytes.org> diff --git a/a/1.txt b/N1/1.txt index 7f77c5c..05589b2 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,5 +1,5 @@ On Wed, Jan 25, 2012 at 08:39:32AM +0100, Hiroshi Doyu wrote: -> From: Hiroshi DOYU <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +> From: Hiroshi DOYU <hdoyu@nvidia.com> > Date: Thu, 17 Nov 2011 07:31:31 +0200 > Subject: [PATCH 2/2] ARM: IOMMU: Tegra30: Add iommu_ops for SMMU driver > @@ -9,7 +9,7 @@ On Wed, Jan 25, 2012 at 08:39:32AM +0100, Hiroshi Doyu wrote: > This H/W module supports multiple virtual address spaces(domain x4), > and manages 2 level H/W translation pagetable. > -> Signed-off-by: Hiroshi DOYU <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +> Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> > --- > arch/arm/mach-tegra/include/mach/smmu.h | 63 ++ > drivers/iommu/Kconfig | 11 + diff --git a/a/content_digest b/N1/content_digest index 8e8de2d..d30d906 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,20 +1,13 @@ "ref\020120124142521.GE6269@8bytes.org\0" "ref\020120125.093932.783007031082378997.hdoyu@nvidia.com\0" - "ref\020120125.093932.783007031082378997.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org\0" - "From\0joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org <joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>\0" - "Subject\0Re: [PATCH 2/2] ARM: IOMMU: Tegra30: Add iommu_ops for SMMU driver\0" + "From\0joro@8bytes.org (joro at 8bytes.org)\0" + "Subject\0[PATCH 2/2] ARM: IOMMU: Tegra30: Add iommu_ops for SMMU driver\0" "Date\0Thu, 26 Jan 2012 15:59:16 +0100\0" - "To\0Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" - "Cc\0balbi-l0cyMroinI0@public.gmane.org <balbi-l0cyMroinI0@public.gmane.org>" - iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org <iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org> - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org> - linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - " linaro-mm-sig-cunTk1MwBs8s++Sfvej+rw@public.gmane.org <linaro-mm-sig-cunTk1MwBs8s++Sfvej+rw@public.gmane.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Wed, Jan 25, 2012 at 08:39:32AM +0100, Hiroshi Doyu wrote:\n" - "> From: Hiroshi DOYU <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + "> From: Hiroshi DOYU <hdoyu@nvidia.com>\n" "> Date: Thu, 17 Nov 2011 07:31:31 +0200\n" "> Subject: [PATCH 2/2] ARM: IOMMU: Tegra30: Add iommu_ops for SMMU driver\n" "> \n" @@ -24,7 +17,7 @@ "> This H/W module supports multiple virtual address spaces(domain x4),\n" "> and manages 2 level H/W translation pagetable.\n" "> \n" - "> Signed-off-by: Hiroshi DOYU <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + "> Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>\n" "> ---\n" "> arch/arm/mach-tegra/include/mach/smmu.h | 63 ++\n" "> drivers/iommu/Kconfig | 11 +\n" @@ -39,4 +32,4 @@ "\n" "\tJoerg" -11cca0f985c7c5401ae55f04af5a79056b9c7595f26a7fb9e20b92db038b9e6b +c3fc6d348cce9200dce4b31ea625b2a640800ebb09292af8436b7d8bcc9fb9bd
diff --git a/a/1.txt b/N2/1.txt index 7f77c5c..05589b2 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,5 +1,5 @@ On Wed, Jan 25, 2012 at 08:39:32AM +0100, Hiroshi Doyu wrote: -> From: Hiroshi DOYU <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +> From: Hiroshi DOYU <hdoyu@nvidia.com> > Date: Thu, 17 Nov 2011 07:31:31 +0200 > Subject: [PATCH 2/2] ARM: IOMMU: Tegra30: Add iommu_ops for SMMU driver > @@ -9,7 +9,7 @@ On Wed, Jan 25, 2012 at 08:39:32AM +0100, Hiroshi Doyu wrote: > This H/W module supports multiple virtual address spaces(domain x4), > and manages 2 level H/W translation pagetable. > -> Signed-off-by: Hiroshi DOYU <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +> Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> > --- > arch/arm/mach-tegra/include/mach/smmu.h | 63 ++ > drivers/iommu/Kconfig | 11 + diff --git a/a/content_digest b/N2/content_digest index 8e8de2d..ca316fe 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,20 +1,19 @@ "ref\020120124142521.GE6269@8bytes.org\0" "ref\020120125.093932.783007031082378997.hdoyu@nvidia.com\0" - "ref\020120125.093932.783007031082378997.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org\0" - "From\0joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org <joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>\0" + "From\0joro@8bytes.org <joro@8bytes.org>\0" "Subject\0Re: [PATCH 2/2] ARM: IOMMU: Tegra30: Add iommu_ops for SMMU driver\0" "Date\0Thu, 26 Jan 2012 15:59:16 +0100\0" - "To\0Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" - "Cc\0balbi-l0cyMroinI0@public.gmane.org <balbi-l0cyMroinI0@public.gmane.org>" - iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org <iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org> - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org> - linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - " linaro-mm-sig-cunTk1MwBs8s++Sfvej+rw@public.gmane.org <linaro-mm-sig-cunTk1MwBs8s++Sfvej+rw@public.gmane.org>\0" + "To\0Hiroshi Doyu <hdoyu@nvidia.com>\0" + "Cc\0balbi@ti.com <balbi@ti.com>" + iommu@lists.linux-foundation.org <iommu@lists.linux-foundation.org> + linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> + linux-tegra@vger.kernel.org <linux-tegra@vger.kernel.org> + linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> + " linaro-mm-sig@lists.linaro.org <linaro-mm-sig@lists.linaro.org>\0" "\00:1\0" "b\0" "On Wed, Jan 25, 2012 at 08:39:32AM +0100, Hiroshi Doyu wrote:\n" - "> From: Hiroshi DOYU <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + "> From: Hiroshi DOYU <hdoyu@nvidia.com>\n" "> Date: Thu, 17 Nov 2011 07:31:31 +0200\n" "> Subject: [PATCH 2/2] ARM: IOMMU: Tegra30: Add iommu_ops for SMMU driver\n" "> \n" @@ -24,7 +23,7 @@ "> This H/W module supports multiple virtual address spaces(domain x4),\n" "> and manages 2 level H/W translation pagetable.\n" "> \n" - "> Signed-off-by: Hiroshi DOYU <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + "> Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>\n" "> ---\n" "> arch/arm/mach-tegra/include/mach/smmu.h | 63 ++\n" "> drivers/iommu/Kconfig | 11 +\n" @@ -39,4 +38,4 @@ "\n" "\tJoerg" -11cca0f985c7c5401ae55f04af5a79056b9c7595f26a7fb9e20b92db038b9e6b +6f01f240fa44d51d41eedfca92cca17ea254f1e86e26dc342f374b52846f55b5
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