From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH 0/4] [CFT] interlaced support
Date: Fri, 27 Jan 2012 11:22:21 +0100
Message-ID: <20120127102221.GA3901@phenom.ffwll.local>
References: <1327611693-27294-1-git-send-email-daniel.vetter@ffwll.ch>
	<CA+gsUGRGfCN4zLC+0mqMLVkZh4QMjQm2AjpBmVE0nLqy2bc+5A@mail.gmail.com>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Return-path: <intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org>
Received: from mail-wi0-f177.google.com (mail-wi0-f177.google.com
	[209.85.212.177])
	by gabe.freedesktop.org (Postfix) with ESMTP id C15069E73D
	for <intel-gfx@lists.freedesktop.org>;
	Fri, 27 Jan 2012 02:22:32 -0800 (PST)
Received: by wico1 with SMTP id o1so1444121wic.36
	for <intel-gfx@lists.freedesktop.org>;
	Fri, 27 Jan 2012 02:22:32 -0800 (PST)
Content-Disposition: inline
In-Reply-To: <CA+gsUGRGfCN4zLC+0mqMLVkZh4QMjQm2AjpBmVE0nLqy2bc+5A@mail.gmail.com>
List-Unsubscribe: <http://lists.freedesktop.org/mailman/options/intel-gfx>,
	<mailto:intel-gfx-request@lists.freedesktop.org?subject=unsubscribe>
List-Archive: <http://lists.freedesktop.org/archives/intel-gfx>
List-Post: <mailto:intel-gfx@lists.freedesktop.org>
List-Help: <mailto:intel-gfx-request@lists.freedesktop.org?subject=help>
List-Subscribe: <http://lists.freedesktop.org/mailman/listinfo/intel-gfx>,
	<mailto:intel-gfx-request@lists.freedesktop.org?subject=subscribe>
Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org
Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org
To: Paulo Zanoni <przanoni@gmail.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>, Intel Graphics Development <intel-gfx@lists.freedesktop.org>
List-Id: intel-gfx@lists.freedesktop.org

On Fri, Jan 27, 2012 at 12:56:23AM -0200, Paulo Zanoni wrote:
> Hi
> 
> 2012/1/26 Daniel Vetter <daniel.vetter@ffwll.ch>:
> > Hi all,
> >
> > http://cgit.freedesktop.org/~danvet/drm/log/?h=interlaced
> >
> 
> I just tested your patch set and it didn't work: my monitor reported
> 1920x539@50Hz. We're missing something from patch "fixup interlace
> vertical timings confusion". The reg dump is attached.
> 
> By the way, VTOTAL_B was 1078. We need to remove those "-1" and also
> those "-2". Look at ironlake_crtc_mode_set: we already do the
> subtractions when we write to HSYNC, HTOTAL, etc. From the register
> descriptions, those -1 are independent of interlaced or
> non-interlaced. I believe there was some confusion with these
> registers because intel_reg_dumper already re-adds +1 when showing the
> register values.

Ok, so something is still botched up :( Btw I think VSYNCSHIFT is only
used by analog outputs to place the 2nd field lines exactly between the
lines of the 1st field. Can you also please attach a reg dump with Peter's
patch so I can compare?

Thanks, Daniel
-- 
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48