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From: Andrew Morton <akpm@linux-foundation.org>
To: Venu Byravarasu <vbyravarasu@nvidia.com>
Cc: a.zummo@towertech.it, rtc-linux@googlegroups.com,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] rtc: twl: optimize IRQ bit access
Date: Fri, 27 Jan 2012 16:38:40 -0800	[thread overview]
Message-ID: <20120127163840.ff030c49.akpm@linux-foundation.org> (raw)
In-Reply-To: <1326973942-11576-1-git-send-email-vbyravarasu@nvidia.com>

On Thu, 19 Jan 2012 17:22:22 +0530
Venu Byravarasu <vbyravarasu@nvidia.com> wrote:

> From: Venu Byravarasu <vbyravarasu@nvidia.com>
> 
> As TWL RTC driver is having a cached copy of enabled RTC interrupt bits
> in variable rtc_irq_bits, that can be checked before really setting
> or masking any of the interrupt bits.
> 
> ...
>
> --- a/drivers/rtc/rtc-twl.c
> +++ b/drivers/rtc/rtc-twl.c
> @@ -176,6 +176,10 @@ static int set_rtc_irq_bit(unsigned char bit)
>  	unsigned char val;
>  	int ret;
>  
> +	/* if the bit is set, return from here */
> +	if (rtc_irq_bits & bit)
> +		return 0;
> +
>  	val = rtc_irq_bits | bit;
>  	val &= ~BIT_RTC_INTERRUPTS_REG_EVERY_M;
>  	ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
> @@ -193,6 +197,10 @@ static int mask_rtc_irq_bit(unsigned char bit)
>  	unsigned char val;
>  	int ret;
>  
> +	/* if the bit is clear, return from here */
> +	if (!(rtc_irq_bits & bit))
> +		return 0;
> +
>  	val = rtc_irq_bits & ~bit;
>  	ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
>  	if (ret == 0)

Are these functions called frequently enough to make this optimisation
significant?

I can see no locking protecting rtc_irq_bits from concurrent updaters. 
Is this code as racy as it appears?



  reply	other threads:[~2012-01-28  0:38 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-01-19 11:52 [PATCH] rtc: twl: optimize IRQ bit access Venu Byravarasu
2012-01-28  0:38 ` Andrew Morton [this message]
2012-01-30  3:17   ` Venu Byravarasu

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