From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH] drm/i915: Track dirtying of CPU cache for LLC Date: Mon, 27 Feb 2012 18:50:33 +0100 Message-ID: <20120227175033.GA1050@phenom.ffwll.local> References: <1330118511-5884-1-git-send-email-chris@chris-wilson.co.uk> <20120227163019.GB4866@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-we0-f177.google.com (mail-we0-f177.google.com [74.125.82.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 82DF49E791 for ; Mon, 27 Feb 2012 09:50:17 -0800 (PST) Received: by werp11 with SMTP id p11so900612wer.36 for ; Mon, 27 Feb 2012 09:50:16 -0800 (PST) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Mon, Feb 27, 2012 at 05:10:24PM +0000, Chris Wilson wrote: > On Mon, 27 Feb 2012 17:30:19 +0100, Daniel Vetter wrote: > > On Fri, Feb 24, 2012 at 09:21:51PM +0000, Chris Wilson wrote: > > > Doing mixed rendering into the front/back scanout buffers lead to the > > > interesting rediscovery of clflushing when page-flipping. A painful > > > experience indeed. > > > > > > Signed-off-by: Chris Wilson > > > > Hm, I might be a bit dense here (again ...) but I don't follow what this > > exactly fixes. Care to elaborate a bit? > > When we are page-flipping, we take an active render buffer and flush it > to the display plane. This involves a migration into the uncached > domain and a clflush. If we allow the bo to transistion back to LLC > cached for fast rendering when it becomes the back-buffer again, we > incur another clflush back into the display place, even though we never > touch it with the CPU whilst it is in the CPU domain. Similarly, if we > are recycling bo used else for render buffers to be page-flipped. The > patch avoids the defensive clflush by recording when we ignore transitions > in and out of the CPU cache domain due to cache coherency and replaying > those missed clflushes when the object is no longer cache coherent. > > The effect of the extra clflushes is quite pronounced (>30% framerate > drop for glxgears) and really does interfere with experiments to manage > cache levels. It's not the only bottleneck, but it is the major one. Ah, so you're playing around and have fun ;-) I think I'll wait with picking this up until you come up with the real deal ... -Daniel -- Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48