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Date: Sun, 4 Mar 2012 17:41:27 +0200
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Subject: Re: [Qemu-devel] [PATCH] pci: fix bridge IO/BASE
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To: Blue Swirl <blauwirbel@gmail.com>
Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>, qemu-devel@nongnu.org, Anthony Liguori <anthony@codemonkey.ws>

On Sun, Mar 04, 2012 at 02:35:28PM +0000, Blue Swirl wrote:
> Yes, it's the host bridge, also known as PBM. It's documented in
> UltraSPARC IIi User's Manual and there it says that the device is
> found in the configuration space.

So it seems I can make things work if
I disable is_bridge and make some bits in
BAR4 writeable:

pci_set_long(d->wmask + 0x20, 0xffff0000);

I don't yet know why, and the manual says there
should be no BARs.

> The secondary bridges are Simbas and should be called APBs.
> 
> >
> >
> > --
> > MST