Re: [PATCH 1 of 2] traps: AMD PM RDMSRs (MSR_K8_PSTATE_CTRL, etc)

[Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>]

On Thu, Mar 01, 2012 at 04:33:42PM +0000, Keir Fraser wrote:
> On 24/02/2012 10:38, "Jan Beulich" <JBeulich@suse.com> wrote:
> 
> >>>> On 24.02.12 at 07:43, Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> wrote:
> >> # HG changeset patch
> >> # User Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
> >> # Date 1330065828 18000
> >> # Node ID a34b652afb0ca484b7416008c95fd36ffbbea334
> >> # Parent  a4d93d0e0df2fafe5b3e2dab3e34799498a875e2
> >> traps: AMD PM RDMSRs (MSR_K8_PSTATE_CTRL, etc)
> >> 
> >> The restriction to read and write the AMD power management MSRs is gated if
> >> the
> >> domain 0 is the PM domain (so FREQCTL_dom0_kernel is set). But we can
> >> relax this restriction and allow the privileged domain to read the MSRs
> >> (but not write). This allows the priviliged domain to harvest the power
> >> management information (ACPI _PSS states) and send it to the hypervisor.
> >> 
> >> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
> >> 
> >> diff -r a4d93d0e0df2 -r a34b652afb0c xen/arch/x86/traps.c
> >> --- a/xen/arch/x86/traps.c Wed Feb 22 14:33:24 2012 +0000
> >> +++ b/xen/arch/x86/traps.c Fri Feb 24 01:43:48 2012 -0500
> >> @@ -2610,7 +2610,7 @@ static int emulate_privileged_op(struct
> >>          case MSR_K8_PSTATE7:
> >>              if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD )
> >>                  goto fail;
> >> -            if ( !is_cpufreq_controller(v->domain) )
> >> +            if ( !is_cpufreq_controller(v->domain) && !IS_PRIV(v->domain) )
> > 
> > As said already in response to your Linux side overview mail, while
> > I don't view this as having potential to cause any problems, I also
> > don't see the need.
> > 
> > And then if this indeed is wanted, replacing is_cpufreq_controller()
> > by IS_PRIV() rather than adding the latter would seem preferable
> > (because of being more strait forward).
> 
> Any response to this, Konrad?

Ah, lets drop this patch. Jan got me thinking about doing it in a much
nicer way without a need to do the MSRs.

> 
>  K.
> 
> > Jan
> > 
> >>              {
> >>                  regs->eax = regs->edx = 0;
> >>                  break;
> >> 
> >> 
> >> 
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> > 
> > 
> > 
> > 
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