From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 1/3] drm/i915: s/i915_gem_do_init/i915_gem_init_global_gtt Date: Mon, 26 Mar 2012 10:58:02 +0200 Message-ID: <20120326085801.GA7010@aaron.ffwll.local> References: <1332747942-2143-1-git-send-email-daniel.vetter@ffwll.ch> <1332751691_97010@CP5-2952> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wg0-f43.google.com (mail-wg0-f43.google.com [74.125.82.43]) by gabe.freedesktop.org (Postfix) with ESMTP id 825A8A088B for ; Mon, 26 Mar 2012 01:58:10 -0700 (PDT) Received: by wgbdr12 with SMTP id dr12so2913886wgb.12 for ; Mon, 26 Mar 2012 01:58:09 -0700 (PDT) In-Reply-To: <1332751691_97010@CP5-2952> Content-Disposition: inline List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson Cc: Daniel Vetter , Intel Graphics Development List-Id: intel-gfx@lists.freedesktop.org On Mon, Mar 26, 2012 at 09:48:01AM +0100, Chris Wilson wrote: > On Mon, 26 Mar 2012 09:45:40 +0200, Daniel Vetter wrote: > > int > > i915_gem_init_ioctl(struct drm_device *dev, void *data, > > struct drm_file *file) > > @@ -155,7 +136,8 @@ i915_gem_init_ioctl(struct drm_device *dev, void *data, > > return -EINVAL; > > > > mutex_lock(&dev->struct_mutex); > > - i915_gem_do_init(dev, args->gtt_start, args->gtt_end, args->gtt_end); > > + i915_gem_init_global_gtt(dev, args->gtt_start, > > + args->gtt_end, args->gtt_end); > > mutex_unlock(&dev->struct_mutex); > > > > return 0; > > This raises the interesting question of ppgtt interacting with DRI1, a > never supported combination. Do we start making that expressly clear > with a few if (HAS_ALIASING_PPGTT()) return -ENODEV; or even if (gen >= > 6) return -ENODEV; ? Atm ppgtt setup is only done for the modeset case, so even if someone is nutty enough to backport gen6 kms to ums it'll just work. But I'll plan to rework intel-gtt some more and bail out with -EINVAL or whatever for the ums-only ioctls on gen6+. -Daniel -- Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48