From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH 5/7] drm/i915: implement w/a for incorrect
 guarband clipping
Date: Wed, 11 Apr 2012 00:20:11 +0200
Message-ID: <20120410222011.GP4115@phenom.ffwll.local>
References: <1333185723-5047-1-git-send-email-daniel.vetter@ffwll.ch>
	<1333185723-5047-6-git-send-email-daniel.vetter@ffwll.ch>
	<20120410221352.GE21080@bolo_yeung.jf.intel.com>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Return-path: <intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org>
Received: from mail-we0-f177.google.com (mail-we0-f177.google.com
	[74.125.82.177])
	by gabe.freedesktop.org (Postfix) with ESMTP id 46C2C9E7D2
	for <intel-gfx@lists.freedesktop.org>;
	Tue, 10 Apr 2012 15:19:19 -0700 (PDT)
Received: by werp11 with SMTP id p11so223094wer.36
	for <intel-gfx@lists.freedesktop.org>;
	Tue, 10 Apr 2012 15:19:18 -0700 (PDT)
Content-Disposition: inline
In-Reply-To: <20120410221352.GE21080@bolo_yeung.jf.intel.com>
List-Unsubscribe: <http://lists.freedesktop.org/mailman/options/intel-gfx>,
	<mailto:intel-gfx-request@lists.freedesktop.org?subject=unsubscribe>
List-Archive: <http://lists.freedesktop.org/archives/intel-gfx>
List-Post: <mailto:intel-gfx@lists.freedesktop.org>
List-Help: <mailto:intel-gfx-request@lists.freedesktop.org?subject=help>
List-Subscribe: <http://lists.freedesktop.org/mailman/listinfo/intel-gfx>,
	<mailto:intel-gfx-request@lists.freedesktop.org?subject=subscribe>
Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org
Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org
To: Ben Widawsky <ben@bwidawsk.net>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>, Intel Graphics Development <intel-gfx@lists.freedesktop.org>
List-Id: intel-gfx@lists.freedesktop.org

On Tue, Apr 10, 2012 at 03:13:52PM -0700, Ben Widawsky wrote:
> On Sat, Mar 31, 2012 at 11:22:01AM +0200, Daniel Vetter wrote:
> > According to Bsepc, this should be set by default, but isn't. See vo1c.4
> > "Render Engine Command Streamer", Section 1.1.14.3 "3D_CHICKEN3"
> > 
> > Bspec also says that we always need to set all mask bits.
> I think this deserves to be a comment in the code itself. That really
> made me say WTF when looking at the patch.

Agreed, I'll add a comment to that effect.

> > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

-- 
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48