From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH] drm/i915: re-init modeset hw state after
	gpu reset
Date: Wed, 11 Apr 2012 12:09:11 +0200
Message-ID: <20120411100911.GD4296@phenom.ffwll.local>
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To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>, Intel Graphics Development <intel-gfx@lists.freedesktop.org>
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On Tue, Apr 10, 2012 at 03:10:23PM +0100, Chris Wilson wrote:
> On Tue, 10 Apr 2012 15:50:11 +0200, Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
> > After a gpu reset we need to re-init some of the hw state we only
> > initialize when modeset is enabled, like rc6, hw contexts or render/GT
> > core clock gating and workaround register settings.
> > 
> > Note that this patch has a small change in the resume code:
> > - rc6 on gen6+ is only restored for the modeset case (for more
> >   consistency with other callsites). This is no problem because recent
> >   kernels refuse to load drm/i915 without kms on gen6+
> > - rc6/emon on ilk is only restored for the modeset case. This is no
> >   problem because rc6 is disabled by default on ilk, and ums on ilk
> >   has never really been a supported option outside of horrible rhel
> >   backports.
> > 
> > v2: Chris Wilson noticed that we not only fail to restore the clock
> > gating settings after gpu reset.
> > 
> > v3: Move the call to modeset_init_hw in _reset out of the
> > struct_mutext protected area - other callers don't hold it, too.
> > 
> > Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> 
> I don't think it makes the locking any worse than it already is, but it
> is becoming more and more suspect.
> 
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Queued for -next, thanks for the review.
-Daniel
-- 
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48