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Date: Fri, 27 Apr 2012 18:09:22 +0200
From: Robert Richter <robert.richter@amd.com>
To: Peter Zijlstra <peterz@infradead.org>
CC: Stephane Eranian <eranian@google.com>, Ingo Molnar <mingo@elte.hu>,
        Arnaldo Carvalho de Melo <acme@redhat.com>,
        LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 06/12] perf/x86-ibs: Precise event sampling with IBS for
 AMD CPUs
Message-ID: <20120427160922.GI18810@erda.amd.com>
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On 27.04.12 17:30:33, Peter Zijlstra wrote:
> On Fri, 2012-04-27 at 14:54 +0200, Robert Richter wrote:
> > My suggestions was to use level 1 for all samples and level 2 for
> > samples that only contain a precise rip, saving level 3 for future
> > use. 
> 
> No.

Ok, will look how to handle this in userspace.

But do you agree to have level 1 and 2 mapped to ibs, not just only
level 2 (since I don't want to fail with r076:p)?

-Robert

-- 
Advanced Micro Devices, Inc.
Operating System Research Center