[U-Boot] [PATCH 1/5] exynos5: Add system register structure

[Marek Vasut <marex@denx.de>]

Dear Rajeshwari Shinde,

> This patch add structure for SYSREG.

Ccing Minkyu. Can I get your opinion on these patches please?

> 
> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
> Reviewed-by: Vivek Gautam <gautam.vivek@samsung.com>
> Reviewed-by: Simon Glass <sjg@chromium.org>
> ---
>  arch/arm/include/asm/arch-exynos/sysreg.h |   43
> +++++++++++++++++++++++++++++ 1 files changed, 43 insertions(+), 0
> deletions(-)
>  create mode 100644 arch/arm/include/asm/arch-exynos/sysreg.h
> 
> diff --git a/arch/arm/include/asm/arch-exynos/sysreg.h
> b/arch/arm/include/asm/arch-exynos/sysreg.h new file mode 100644
> index 0000000..aca4b2b
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-exynos/sysreg.h
> @@ -0,0 +1,43 @@
> +/*
> + * (C) Copyright 2012 Samsung Electronics
> + * Register map for sysreg
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef __EXYNOS5_SYSREG_H__
> +#define __EXYNOS5_SYSREG_H__
> +
> +#ifndef __ASSEMBLY__
> +/* sysreg map */
> +struct exynos5_sysreg {
> +	/* Add registers as and when required */
> +	unsigned char	res1[0x214];
> +	unsigned int	disp1blk_cfg;
> +	unsigned int	dispblk_cfg2;
> +	unsigned int	hdcp_e_fuse_mem_cfg;
> +	unsigned int	gsclblk_cfg0;
> +	unsigned int	gsclblk_cfg1;
> +	unsigned int	ispblk_cfg;
> +	unsigned int	usb20_phy_cfg;
> +	unsigned char	res2[0x29c];
> +	unsigned int	mipi_dphy;
> +	unsigned int	dptx_phy;
> +	unsigned int	phyclk_sel;
> +};
> +#endif
> +
> +#endif

Best regards,
Marek Vasut