From: Richard Yang <weiyang@linux.vnet.ibm.com>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: Richard Yang <weiyang@linux.vnet.ibm.com>, linux-pci@vger.kernel.org
Subject: Re: Does my understanding correct?
Date: Mon, 7 May 2012 11:00:05 +0800 [thread overview]
Message-ID: <20120507030005.GA13838@richard> (raw)
In-Reply-To: <CAErSpo40hwqdnUOmjbdm+3TNt_w0rYg6-qD7nYmauRvaQXhkiQ@mail.gmail.com>
On Thu, May 03, 2012 at 10:39:42AM -0600, Bjorn Helgaas wrote:
>>
>>
>>
>>
>> +-------------------------------|------------------------------+
>> | | |
>> | +----+----+ |
>> | | virtual | |
>> | | PCI-PCI | |
>> | | bridge | |
>> | +----+----+
>> | | |
>> | |Bus#3
>> | | |
>> | +----------------------------------------+ |
>> | | | | |
>> | | | | |
>> | |03:00.0 |03:01.0 |03:02.0 |
>> | +----+----+ +----+----+ +----++---+ |
>> | | virtual | | virtual | | virtual | |
>> | | PCI-PCI | | PCI-PCI | | PCI-PCI | |
>> | | bridge | | bridge | | bridge | |
>> | +----+----+ +----+----+ +----+----+ |
>> | | | | |
>> | | | | |
>> +----------|--------------------|-------------------|----------+
>> | Bus#4? | |
>> v v v
>>
I read the code of pci_scan_child_bus(), in this function it will call
pci_scan_slot() like this.
for (devfn = 0; devfn < 0x100; devfn += 8)
pci_scan_slot(bus, devfn);
I think this scheme is based on the PCI LB specification.
If the bus->self is ari enabled, one call of pci_scan_slot(bus, 0) will
scan all the functions under this bus.
Then next 2^5-1 times of pci_scan_slot() will configure the function which
has already been configured, or even empty function.
My idea is
if the bus is ari enabled, just one call of pci_scan_slot() will be
called.
Do you think this works? Or may I miss some real case?
>> So the link itself is Bus#4?
>
>Exactly.
>
>> If there is no device under this link, will Bus#4 appear in kernel?
>
>Yes, I'm pretty sure we build the bus 04 pci_bus structure, then scan
>bus 04 for devices. Even if we find none, the pci_bus struct for bus
>04 remains.
>
>> And then the PCIe switch is represented by 4 pci_dev structure and each
>> is bridge type?
>
>Yes. And each has an associated pci_bus struct for its secondary bus.
>
>Bjorn
--
Richard Yang
Help you, Help me
next prev parent reply other threads:[~2012-05-07 3:00 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-04-27 9:27 Does my understanding correct? Richard Yang
2012-04-27 14:10 ` Jiang Liu
2012-04-27 15:55 ` Bjorn Helgaas
2012-04-27 14:17 ` Bjorn Helgaas
2012-04-28 5:01 ` Richard Yang
2012-04-28 7:21 ` Richard Yang
2012-04-30 15:56 ` Bjorn Helgaas
2012-05-02 6:24 ` Richard Yang
2012-05-02 14:59 ` Bjorn Helgaas
2012-05-02 21:05 ` Don Dutile
2012-05-03 6:21 ` Richard Yang
2012-05-03 16:39 ` Bjorn Helgaas
2012-05-04 2:11 ` Richard Yang
2012-05-06 15:21 ` Richard Yang
2012-05-07 3:00 ` Richard Yang [this message]
2012-04-28 8:21 ` Richard Yang
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