From mboxrd@z Thu Jan 1 00:00:00 1970 From: Greg Kroah-Hartman Subject: Re: [PATCH 1/4] ARM: tegra20: Add Tegra Memory Controller(MC) driver Date: Thu, 10 May 2012 11:18:15 -0700 Message-ID: <20120510181815.GA17018@kroah.com> References: <1336635764-30597-1-git-send-email-hdoyu@nvidia.com> <4FABF9AB.6020902@wwwdotorg.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <4FABF9AB.6020902-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Stephen Warren Cc: Hiroshi DOYU , linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Grant Likely , Rob Herring , Rob Landley , Colin Cross , Olof Johansson , Russell King , Santosh Shilimkar , Benoit Cousson , Aneesh V , devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org, linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: linux-tegra@vger.kernel.org On Thu, May 10, 2012 at 11:23:55AM -0600, Stephen Warren wrote: > On 05/10/2012 01:42 AM, Hiroshi DOYU wrote: > > Tegra Memory Controller(MC) driver for Tegra20 > > Added to support MC General interrupts, mainly for IOMMU(GART). > > Greg, you appear to have been commiting all of drivers/memory. I assume > you'll take patches 1 and 3 in this series, and I will take 2 and 4 > through the Tegra tree? I can take them all through the Tegra tree if > you want. I think you will get a conflict if you take the memory ones in your tree, so I will take those two, thanks. greg k-h From mboxrd@z Thu Jan 1 00:00:00 1970 From: gregkh@linuxfoundation.org (Greg Kroah-Hartman) Date: Thu, 10 May 2012 11:18:15 -0700 Subject: [PATCH 1/4] ARM: tegra20: Add Tegra Memory Controller(MC) driver In-Reply-To: <4FABF9AB.6020902@wwwdotorg.org> References: <1336635764-30597-1-git-send-email-hdoyu@nvidia.com> <4FABF9AB.6020902@wwwdotorg.org> Message-ID: <20120510181815.GA17018@kroah.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Thu, May 10, 2012 at 11:23:55AM -0600, Stephen Warren wrote: > On 05/10/2012 01:42 AM, Hiroshi DOYU wrote: > > Tegra Memory Controller(MC) driver for Tegra20 > > Added to support MC General interrupts, mainly for IOMMU(GART). > > Greg, you appear to have been commiting all of drivers/memory. I assume > you'll take patches 1 and 3 in this series, and I will take 2 and 4 > through the Tegra tree? I can take them all through the Tegra tree if > you want. I think you will get a conflict if you take the memory ones in your tree, so I will take those two, thanks. greg k-h From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760866Ab2EJSSX (ORCPT ); Thu, 10 May 2012 14:18:23 -0400 Received: from mail-pb0-f46.google.com ([209.85.160.46]:51556 "EHLO mail-pb0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756926Ab2EJSSV (ORCPT ); Thu, 10 May 2012 14:18:21 -0400 Date: Thu, 10 May 2012 11:18:15 -0700 From: Greg Kroah-Hartman To: Stephen Warren Cc: Hiroshi DOYU , linux-tegra@vger.kernel.org, Grant Likely , Rob Herring , Rob Landley , Colin Cross , Olof Johansson , Russell King , Santosh Shilimkar , Benoit Cousson , Aneesh V , devicetree-discuss@lists.ozlabs.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 1/4] ARM: tegra20: Add Tegra Memory Controller(MC) driver Message-ID: <20120510181815.GA17018@kroah.com> References: <1336635764-30597-1-git-send-email-hdoyu@nvidia.com> <4FABF9AB.6020902@wwwdotorg.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4FABF9AB.6020902@wwwdotorg.org> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, May 10, 2012 at 11:23:55AM -0600, Stephen Warren wrote: > On 05/10/2012 01:42 AM, Hiroshi DOYU wrote: > > Tegra Memory Controller(MC) driver for Tegra20 > > Added to support MC General interrupts, mainly for IOMMU(GART). > > Greg, you appear to have been commiting all of drivers/memory. I assume > you'll take patches 1 and 3 in this series, and I will take 2 and 4 > through the Tegra tree? I can take them all through the Tegra tree if > you want. I think you will get a conflict if you take the memory ones in your tree, so I will take those two, thanks. greg k-h